Patents by Inventor Shun Fujimoto

Shun Fujimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130029470
    Abstract: A method of forming a semiconductor device includes the following processes. A dummy insulating film is formed over a semiconductor substrate by using a source material that is free of carbon as an essential component. A hole that penetrates the dummy insulating film is formed. A conductive film is formed, which covers at least a side wall of the hole of the dummy insulating film. The dummy insulating film is removed to expose an outer surface of the conductive film.
    Type: Application
    Filed: October 24, 2011
    Publication date: January 31, 2013
    Applicant: ELPIDA MEMORY, INC.
    Inventors: Nana HATAYA, Nobuyuki SAKO, Hiroki YAMAWAKI, Shun FUJIMOTO, Jiro MIYAHARA
  • Publication number: 20100314715
    Abstract: A semiconductor device includes a memory cell area; and a peripheral circuit area separated by a groove from the memory cell area. The peripheral circuit area is positioned outside the memory cell area. The memory cell area includes a plurality of electrodes that stand; and a first insulating film that support the plurality of electrodes standing. The first insulating film has a plurality of holes through which the plurality of electrodes penetrates. The first insulating film is in contact with at least a part of an outside surface of the electrode. The first insulating film has at least a first opening which is connected to part of the plurality of holes. The first insulating film has at least a second opening which is closer to the groove than any holes of the plurality of holes. The second opening is separated from the plurality of holes.
    Type: Application
    Filed: June 10, 2010
    Publication date: December 16, 2010
    Inventor: Shun Fujimoto
  • Patent number: 7514314
    Abstract: A method of manufacturing a semiconductor device includes: (A) forming a gate electrode of a transistor on a substrate, a top layer of the gate electrode being a first metal film; (B) blanket depositing an interlayer insulating film; and (C) forming a first contact hole contacting the gate electrode and a second contact hole contacting a surface of the substrate. The method further includes: (D) siliciding an exposed surface of the first metal film to form a first silicide at a bottom of the first contact hole; (E) after the (D) process, blanket depositing a second metal film; and (F) after the (E) process, forming a second silicide at a bottom of the second contact hole through a silicide reaction between the second metal film and the surface of the substrate.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: April 7, 2009
    Assignee: Elpida Memory, Inc.
    Inventor: Shun Fujimoto
  • Publication number: 20070190763
    Abstract: A method of manufacturing a semiconductor device includes: (A) forming a gate electrode of a transistor on a substrate, a top layer of the gate electrode being a first metal film; (B) blanket depositing an interlayer insulating film; and (C) forming a first contact hole contacting the gate electrode and a second contact hole contacting a surface of the substrate. The method further includes: (D) siliciding an exposed surface of the first metal film to form a first silicide at a bottom of the first contact hole; (E) after the (D) process, blanket depositing a second metal film; and (F) after the (E) process, forming a second silicide at a bottom of the second contact hole through a silicide reaction between the second metal film and the surface of the substrate.
    Type: Application
    Filed: January 25, 2007
    Publication date: August 16, 2007
    Applicant: ELPIDA MEMORY, INC.
    Inventor: Shun Fujimoto