Abstract: A semiconductor integrated circuit includes: a first oscillator configured to generate a first clock signal having a first frequency; and at least one second oscillator configured to generate a second clock signal having a second frequency lower than the first frequency, wherein the first oscillator has relatively higher frequency accuracy than the at least one second oscillator, and wherein the at least one second oscillator is capable of being calibrated by using the first clock signal, and the first oscillator is capable of being stopped during a non-calibration period.

Abstract: The present disclosure provides a switch drive circuit. The switch drive circuit is configured to drive a load switch that is a PMOS transistor connected between a high-side transistor and a load. The switch drive circuit is configured to be switchable between (i) a first mode in which the PMOS transistor is fully turned on and (ii) a second mode in which a drive voltage corresponding to the output signal of the first error amplifier is supplied to a gate of the PMOS transistor. A charge pump circuit is configured to operate at least during startup of a boost DC/DC converter. A first rectifying element is configured to apply an output voltage of the charge pump circuit to a bootstrap pin.

Abstract: A molecular resist composition and a pattern forming process. A molecular resist composition comprising a sulfonium salt having a cation of specific structure and an organic solvent has a high sensitivity and forms a resist film with improved resolution and LWR, when processed by EB or EUV lithography. The molecular resist composition does not contain a base polymer. The molecular resist composition comprising a sulfonium salt having a cation of specific partial structure has a high sensitivity and forms a resist film with improved resolution and LWR, so that the resist composition is quite useful for precise micropatterning.

Abstract: Provided is a switching circuit including an input terminal, a switching terminal, a ground terminal, a bootstrap terminal, a high side transistor connected to the input terminal and the switching terminal, a low side transistor connected to the switching terminal and the ground terminal, a bootstrap capacitor connected to the switching terminal and the bootstrap terminal, a bootstrap switch including a PMOS transistor, and a driver circuit that turns on the bootstrap switch in a period in which the low side transistor is on and that turns off the bootstrap switch in a period in which the low side transistor is off, in which the driver circuit includes a level shifter and a buffer, and the level shifter includes an output line, a first resistance, a first transistor, a second resistance, a third resistance, a second transistor, a third transistor, a first capacitor, and a fourth transistor.

Abstract: Disclosed is a switching circuit including an input terminal, a switching terminal, a grounding terminal, a bootstrap terminal, a high-side transistor connected between the input terminal and the switching terminal, a low-side transistor connected between the switching terminal and the grounding terminal, a bootstrap capacitor connected between the switching terminal and the bootstrap terminal, a bootstrap switch connected between a constant voltage line and the bootstrap terminal, and a driver circuit configured to turn on the bootstrap switch in a period of time in which the low-side transistor is on and to turn off the bootstrap switch in a period of time in which the low-side transistor is off. The bootstrap switch includes two P-channel metal oxide semiconductor transistors connected in anti-series with each other between the constant voltage line and the bootstrap terminal.

Abstract: Disclosed is a control circuit of a boost DC-DC converter including a high side transistor and a low side transistor, and a load switch connected between the high side transistor and an output line of the boost DC-DC converter. The control circuit includes a pulse modulator that generates a pulse signal with a pulse modulated to bring an output voltage of the output line close to a target level, a logic circuit that generates a high side control signal and a low side control signal based on the pulse signal, a load switch drive circuit that drives a first PMOS transistor provided as the load switch, and a current detection circuit that generates a current detection signal indicating a current flowing through the first PMOS transistor. The load switch drive circuit is switchable between a first mode and a second mode.

Abstract: Disclosed herein is a control circuit of a boost DC/DC converter having a high-side transistor and a low-side transistor. The circuit includes an input pin that receives an input voltage of the boost DC/DC converter, a pulse modulator that generates a pulse signal pulse-modulated in such a manner that output of the boost DC/DC converter comes close to a target state, a logic circuit that generates a control signal of the high-side transistor and a control signal of the low-side transistor on the basis of the pulse signal, and a switch driving circuit that drives a load switch that is a PMOS transistor connected to the high-side transistor and a load between them. When stopping the boost DC/DC converter, the switch driving circuit applies a voltage corresponding to the input voltage of the boost DC/DC converter to a gate of the PMOS transistor.

Abstract: Disclosed herein is a semiconductor device including a non-volatile memory unit. The non-volatile memory unit has a subject current path disposed in a semiconductor integrated circuit and a fuse element inserted in series on the subject current path, and changes output data according to a voltage between both ends of the fuse element when supply of a subject current to the subject current path is intended. A current supply part that switches the subject current between a plurality of stages is disposed in the non-volatile memory unit.

Abstract: A control circuit of a boost DC/DC converter including a high side transistor and a low side transistor, includes a pulse modulator including a first error amplifier that amplifies an error between a reference voltage and a feedback signal corresponding to an output voltage of the converter, the pulse modulator being configured to generate a pulse signal with a pulse modulated, a logic circuit that generates a high side control signal and a low side control signal, and a load switch drive circuit that drives a load switch that is a PMOS transistor connected between the high side transistor and a load. The load switch drive circuit can make a switch between a first mode for fully turning on the PMOS transistor and a second mode for supplying a drive voltage corresponding to the output signal of the first error amplifier to a gate of the PMOS transistor.

Abstract: There is provided a switching power supply device, including: an output stage circuit including an output transistor installed between an application end of an input voltage and an application end of an output voltage, and configured to generate the output voltage from the input voltage through a switching operation including an operation of switching the output transistor; and a main control circuit configured to execute PWM control for causing the output stage circuit to perform the switching operation at a predetermined PWM frequency based on a feedback voltage according to the output voltage.

Abstract: Disclosed are a power supply control device and an electronic apparatus. The power supply control device includes a power supply unit configured to generate an output voltage from an input voltage, and an output discharge unit configured to start to discharge the output voltage when an instruction to disable the power supply unit is given, and continue discharging the output voltage until the output voltage falls below a predetermined threshold voltage or until a predetermined delay time passes while the output voltage does not fall below the threshold voltage even when an instruction to enable the power supply unit is given. The electronic apparatus includes a power supply device including the power supply control device as a main constituent, and at least one load configured to operate while supplied with an output voltage from the power supply device.

Abstract: A power supply device includes an output transistor provided in series between an input terminal via which to receive an input voltage and an output terminal via which to deliver an output voltage, and is configured to generate the output voltage by bucking the input voltage through control of the state of the output transistor. The power supply device includes a short circuit protection circuit configured to perform short circuit protection operation by keeping off the output transistor based on the output voltage, and a masking circuit configured to be able to mask the short circuit protection operation based on the input voltage and the output voltage.

Abstract: The disclosure relates to a control circuit and control method of a DC/DC converter, and a power management circuit. A control circuit of a DC/DC converter with a stable switching frequency is provided. An on-time generating circuit asserts a turn-off signal after an on time has elapsed from turning-on of a switching transistor. A charging circuit charges a capacitor with a charging current corresponding to an input voltage of the DC/DC converter. A frequency stabilizing circuit generates a control signal such that a switching frequency of the switching transistor approximates a reference frequency. A second comparator compares a slope voltage generated in the capacitor with the threshold voltage corresponding to the control signal, and generates the turn-off signal according to a comparison result.

Abstract: A main control circuit includes a PWM comparator that compares a contrast voltage generated according to a feedback voltage with a ramp voltage having a periodically varying voltage value, and causes an output stage circuit to perform a switching action based on a result of the comparison in the PWM control. A feedback path switch is inserted in a feedback path for propagating a signal according to the feedback voltage to the PWM comparator. The main control circuit controls, upon switching from sleep control that stops the switching action to the PWM control, within a specific period equal to one or more periods of the PWM control, the feedback path switch off and sets a voltage within a variation range of the ramp voltage as an initial voltage for the contrast voltage to thereby start a switching action and controlling the feedback path switch on after the specific period.

Abstract: A DC-DC converter generates an output voltage from an input voltage through current-mode control output feedback control using a current sense signal commensurate with a sampled value obtained by sampling a coil current in a switching output stage, for example, at the midpoint of the ON period or the OFF period of the switching output stage.

Abstract: There is provided a switching power supply device, including: an output stage circuit including an output transistor installed between an application end of an input voltage and an application end of an output voltage, and configured to generate the output voltage from the input voltage through a switching operation including an operation of switching the output transistor; and a main control circuit configured to execute PWM control for causing the output stage circuit to perform the switching operation at a predetermined PWM frequency based on a feedback voltage according to the output voltage.

Abstract: A semiconductor device includes an amplifier that has an output terminal and that outputs via the output terminal a signal commensurate with an input signal fed to the amplifier, a signal conductor that is connected to the output terminal and that conducts a target voltage signal based on the output signal of the amplifier, a shield conductor that is laid along the signal conductor, and a shield drive circuit that controls the voltage on the shield conductor based on the target voltage signal.

Abstract: Disclosed herein is a semiconductor device including a non-volatile memory unit. The non-volatile memory unit has a subject current path disposed in a semiconductor integrated circuit and a fuse element inserted in series on the subject current path, and changes output data according to a voltage between both ends of the fuse element when supply of a subject current to the subject current path is intended. A current supply part that switches the subject current between a plurality of stages is disposed in the non-volatile memory unit.

Abstract: A switch controller performs first sleep operation, to which a transition from normal operation is made when a light load is detected, and second sleep operation, to which a transition is made after the first sleep operation. In the first sleep operation, a coil current is passed via a body diode of any of a plurality of transistors that is off to an input voltage side or to an output voltage side. In the second sleep operation, a current path from at least one of first and second connection nodes to ground is formed.

Abstract: A main control circuit includes a PWM comparator that compares a contrast voltage generated according to a feedback voltage with a ramp voltage having a periodically varying voltage value, and causes an output stage circuit to perform a switching action based on a result of the comparison in the PWM control. A feedback path switch is inserted in a feedback path for propagating a signal according to the feedback voltage to the PWM comparator. The main control circuit controls, upon switching from sleep control that stops the switching action to the PWM control, within a specific period equal to one or more periods of the PWM control, the feedback path switch off and sets a voltage within a variation range of the ramp voltage as an initial voltage for the contrast voltage to thereby start a switching action and controlling the feedback path switch on after the specific period.