Patents by Inventor Shun GOKITA

Shun GOKITA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220261388
    Abstract: A method of processing compaction in a storage system is performed by a storage apparatus and an information processing apparatus. The storage apparatus divides a sorted index structure at a predetermined position into a first and a second portion, performs the compaction on the first portion, and transmits the second portion of the divided index structure to the information processing apparatus. The information processing apparatus performs the compaction on the second portion of the divided index structure, and sends back the second portion that has undergone the compaction to the storage apparatus. Then, the storage apparatus merges the first portion that has undergone the compaction in the storage apparatus and the second portion that has undergone the compaction and received from the information processing apparatus.
    Type: Application
    Filed: November 23, 2021
    Publication date: August 18, 2022
    Applicant: FUJITSU LIMITED
    Inventor: Shun GOKITA
  • Patent number: 11283592
    Abstract: A non-transitory computer-readable recording medium storing a program that causes a computer to execute a process, the process includes comparing first data previously acquired from a data transmission source device and second data currently acquired from the device to specify a difference portion of the second data as compared with the first data; determining a dividing position of the second data so that the difference portion is made into a single block; dividing the second data into first blocks at the dividing position; transmitting, to the device, a first hash value for each of the first blocks and information on the dividing position; and receiving, from the device, the second block corresponding to a second hash value different from the first hash value for each of the first blocks, among second blocks obtained by dividing third data held by the device based on the information on the dividing position.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: March 22, 2022
    Assignee: FUJITSU LIMITED
    Inventor: Shun Gokita
  • Patent number: 11275531
    Abstract: A management apparatus, includes a memory; and a processor coupled to the memory and configured to: manage a library device including one or more drive devices, an accommodation shelf in which accommodation cells that accommodate a plurality of tape media are arranged, and a robot that performs conveyance operation to convey the tape media between the accommodation cells and the drive devices, receive an instruction to write a plurality of pieces of writing data, set, as an erasure coding set, two or more pieces of writing data having a data size less than a threshold among the plurality of pieces of writing data, and allocate the two or more pieces of writing data to one of the plurality of tape media.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: March 15, 2022
    Assignee: FUJITSU LIMITED
    Inventor: Shun Gokita
  • Patent number: 11243877
    Abstract: A method for data management by a computer coupled to a solid state drive (SSD), the SSD being configured to include blocks and channels, each of the blocks being a first area as a unit of data deletion and being configured to include pages, each of the pages being a second area as a unit of data access in the SSD, each of the channels being a transmission and reception route of data to and from the block, the method includes: executing allocation processing for allocating, to a management target having a fixed length determined, a logical block including the blocks coupled to different channels, executing management processing for, when a size of a division management target is more than a size of the page, allocating the division management target to the pages coupled to the different channels included in the logical block allocated to the management target.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: February 8, 2022
    Assignee: FUJITSU LIMITED
    Inventor: Shun Gokita
  • Patent number: 11144236
    Abstract: A method includes: executing a first process includes receiving an entry that includes a kay and a value, selecting a first list from among a plurality of lists in accordance with a first hash value, adding, to the selected first list, a first identifier in association with the received entry, and storing the received entry in any of a first memory device and a second memory device that is greater in latency than the first memory device; and executing a second process that includes receiving a searching request for a value, selecting the first list based on the first hash value derived from the searching key in the received searching request, obtaining the first identifier from the first list selected in the second process, obtaining the entry associated with the first identifier obtained in the second process, and outputting the value in the entry obtained in the second process.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: October 12, 2021
    Assignee: FUJITSU LIMITED
    Inventor: Shun Gokita
  • Publication number: 20210232346
    Abstract: A management apparatus, includes a memory; and a processor coupled to the memory and configured to: manage a library device including one or more drive devices, an accommodation shelf in which accommodation cells that accommodate a plurality of tape media are arranged, and a robot that performs conveyance operation to convey the tape media between the accommodation cells and the drive devices, receive an instruction to write a plurality of pieces of writing data, set, as an erasure coding set, two or more pieces of writing data having a data size less than a threshold among the plurality of pieces of writing data, and allocate the two or more pieces of writing data to one of the plurality of tape media.
    Type: Application
    Filed: November 23, 2020
    Publication date: July 29, 2021
    Applicant: FUJITSU LIMITED
    Inventor: SHUN GOKITA
  • Publication number: 20200228312
    Abstract: A non-transitory computer-readable recording medium storing a program that causes a computer to execute a process, the process includes comparing first data previously acquired from a data transmission source device and second data currently acquired from the device to specify a difference portion of the second data as compared with the first data; determining a dividing position of the second data so that the difference portion is made into a single block; dividing the second data into first blocks at the dividing position; transmitting, to the device, a first hash value for each of the first blocks and information on the dividing position; and receiving, from the device, the second block corresponding to a second hash value different from the first hash value for each of the first blocks, among second blocks obtained by dividing third data held by the device based on the information on the dividing position.
    Type: Application
    Filed: December 11, 2019
    Publication date: July 16, 2020
    Applicant: FUJITSU LIMITED
    Inventor: SHUN GOKITA
  • Patent number: 10713182
    Abstract: An information processing apparatus includes a first memory, a second memory, and a processor coupled to the first memory and the second memory. The first memory is configured to store data and has a first access speed. The second memory is configured to store data and has a second access speed different from the first access speed. The processor is configured to determine respective storage destinations of first data stored in the first memory and second data stored in the second memory from among the first memory and the second memory based on a first access probability and a first latency of the first data and a second access probability and a second latency of the second data.
    Type: Grant
    Filed: July 11, 2018
    Date of Patent: July 14, 2020
    Assignee: FUJITSU LIMITED
    Inventor: Shun Gokita
  • Publication number: 20190339900
    Abstract: A method includes: executing a first process includes receiving an entry that includes a kay and a value, selecting a first list from among a plurality of lists in accordance with a first hash value, adding, to the selected first list, a first identifier in association with the received entry, and storing the received entry in any of a first memory device and a second memory device that is greater in latency than the first memory device; and executing a second process that includes receiving a searching request for a value, selecting the first list based on the first hash value derived from the searching key in the received searching request, obtaining the first identifier from the first list selected in the second process, obtaining the entry associated with the first identifier obtained in the second process, and outputting the value in the entry obtained in the second process.
    Type: Application
    Filed: July 12, 2019
    Publication date: November 7, 2019
    Applicant: FUJITSU LIMITED
    Inventor: SHUN GOKITA
  • Publication number: 20190340120
    Abstract: A method for data management by a computer coupled to a solid state drive (SSD), the SSD being configured to include blocks and channels, each of the blocks being a first area as a unit of data deletion and being configured to include pages, each of the pages being a second area as a unit of data access in the SSD, each of the channels being a transmission and reception route of data to and from the block, the method includes: executing allocation processing for allocating, to a management target having a fixed length determined, a logical block including the blocks coupled to different channels, executing management processing for, when a size of a division management target is more than a size of the page, allocating the division management target to the pages coupled to the different channels included in the logical block allocated to the management target.
    Type: Application
    Filed: April 9, 2019
    Publication date: November 7, 2019
    Applicant: FUJITSU LIMITED
    Inventor: SHUN GOKITA
  • Publication number: 20190018797
    Abstract: An information processing apparatus includes a first memory, a second memory, and a processor coupled to the first memory and the second memory. The first memory is configured to store data and has a first access speed. The second memory is configured to store data and has a second access speed different from the first access speed. The processor is configured to determine respective storage destinations of first data stored in the first memory and second data stored in the second memory from among the first memory and the second memory based on a first access probability and a first latency of the first data and a second access probability and a second latency of the second data.
    Type: Application
    Filed: July 11, 2018
    Publication date: January 17, 2019
    Applicant: FUJITSU LIMITED
    Inventor: SHUN GOKITA
  • Patent number: 10073788
    Abstract: An information processing device includes a first memory and a processor configured to receive first data from the second memory, receive second data from the third memory, store the first data and the second data in the first memory, specify a first latency of the second memory and a second latency of the third memory, specify a first access frequency to the second memory, and a second access frequency to the third memory, select one of the first data and the second data based on first value, a second value, a first data volume of the first data, and a second data volume of the second data, the first value being obtained by multiplying the first latency and the first access frequency, and the second value being obtained by multiplying the second latency and the second access frequency, and delete at least a part of data.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: September 11, 2018
    Assignee: FUJITSU LIMITED
    Inventor: Shun Gokita
  • Publication number: 20170115892
    Abstract: An information processing device includes a first memory and a processor configured to receive first data from the second memory, receive second data from the third memory, store the first data and the second data in the first memory, specify a first latency of the second memory and a second latency of the third memory, specify a first access frequency to the second memory, and a second access frequency to the third memory, select one of the first data and the second data based on first value, a second value, a first data volume of the first data, and a second data volume of the second data, the first value being obtained by multiplying the first latency and the first access frequency, and the second value being obtained by multiplying the second latency and the second access frequency, and delete at least a part of data.
    Type: Application
    Filed: October 6, 2016
    Publication date: April 27, 2017
    Applicant: FUJITSU LIMITED
    Inventor: SHUN GOKITA
  • Publication number: 20140310248
    Abstract: A verification support method includes: referring to a storage to select a second use case to be verified next to a first use case selected from a use case group from the use case group on the basis of a postcondition of the first use case and a precondition of a use case different from the first use case, the storage storing, for use case representing a function of a verification target, the precondition that is met by an input value to be input into the verification target and an output value to be output from the verification target before the function represented by the use case is executed and the postcondition that is met by the input value and the output value after the function represented by the use case is executed.
    Type: Application
    Filed: February 25, 2014
    Publication date: October 16, 2014
    Applicant: FUJITSU LIMITED
    Inventor: Shun GOKITA