Abstract: A lamp structure of an umbrella contains a body, an illumination device, and a control pusher. The body includes a shaft, a notch, a runner slidably, and multiple stretchers. The illumination device includes at least one lighting element, a circuit board, and a battery. The circuit board has a control switch, when the runner is moved upward to push the illumination device, the umbrella is opened. The control pusher is connected to the runner and includes a controlling element. The control pusher is slid vertically with respect to the shaft and is switched in three-section positions, such that the control pusher is slid to a first position, a second position, and a third position relative to the shaft to drive the control switch to be conducted or not so that the circuit board controls the at least one lighting element to power on or off.

Abstract: A cryptographic device for a memory device includes a determination unit, a mapping unit, and a cryptographic unit. The determination unit determines that a memory address is in a protection area to select a key and a random number. The mapping unit maps a binary code to an injection code according to the key and the memory address, in which the binary code includes the random number and the memory address. The cryptographic unit generates a key stream according to the key and the injection code.

Abstract: A parameter checking method includes substituting a plurality of initial parameters into a data integrity algorithm to obtain syndrome data using a processor, and using a hardware cipher to calculate a calculation result based on the data integrity algorithm based on a plurality of calculation parameters corresponding to the initial parameters. Moreover, when the processor determines that the syndrome data is not the same as the calculation result, the processor outputs a hacker attack message, indicating that at least one of the calculation parameters has been tampered with.

Abstract: A system on chip including a first master circuit, a second master circuit, a routing circuit, a bridge control circuit, and a peripheral circuit is provided. The first master circuit provides a first command. The second master circuit provides a second command. The routing circuit receives the first command and the second command and provides an output command. The bridge control circuit receives the output command and stores an attribute setting value. In response to the routing circuit receiving the first command and the first command pointing to the peripheral circuit, the routing circuit uses the first command as the output command and the bridge control circuit determines whether attribute information of the output command matches the attribute setting value. In response to the attribute information of the output command matching the attribute setting value, the bridge control circuit provides the output command to the peripheral circuit.

Abstract: A parameter checking method includes substituting a plurality of initial parameters into a data integrity algorithm to obtain syndrome data using a processor, and using a hardware cipher to calculate a calculation result based on the data integrity algorithm based on a plurality of calculation parameters corresponding to the initial parameters. Moreover, when the processor determines that the syndrome data is not the same as the calculation result, the processor outputs a hacker attack message, indicating that at least one of the calculation parameters has been tampered with.

Abstract: An information security protection method includes: repeatedly substituting a plaintext into an encryption algorithm to obtain a plurality of ciphertexts, and. determining whether the ciphertexts are all the same h the processor core. Each time the processor core substitutes the plaintext into the encryption algorithm, the encryption algorithm outputs a ciphertext. When the processor core determines that the ciphertexts are not all the same, the processor core outputs a hacker attack message, which means that an encryption process has suffered a hacker attack.

Abstract: A system on chip including a first master circuit, a second master circuit, a routing circuit, a bridge control circuit, and a peripheral circuit is provided. The first master circuit provides a first command. The second master circuit provides a second command. The routing circuit receives the first command and the second command and provides an output command. The bridge control circuit receives the output command and stores an attribute setting value. In response to the routing circuit receiving the first command and the first command pointing to the peripheral circuit, the routing circuit uses the first command as the output command and the bridge control circuit determines whether attribute information of the output command matches the attribute setting value. In response to the attribute information of the output command matching the attribute setting value, the bridge control circuit provides the output command to the peripheral circuit.

Abstract: A system on chip including a first end-circuit, a second end-circuit, and an assignment circuit is provided. The first end-circuit stores a first attribute set value. The second end-circuit stores a second attribute set value. In response to the assignment circuit assigning the output command to the first end-circuit, the first end-circuit determines whether the attribute information of the output command matches the first attribute set value. In response to the attribute information of the output command matching the first attribute set value, the first end-circuit performs the output command. In response to the assignment circuit assigning the output command to the second end-circuit, the second end-circuit determines whether the attribute information of the output command matches the second attribute set value. In response to the attribute information of the output command matching the second attribute set value, the second end-circuit performs the output command.

Abstract: A system on chip including a first peripheral circuit, a second peripheral circuit, and a first bridge control circuit is provided. The first bridge control circuit stores a first attribute setting value and a second attribute setting value and determines whether the attribute information of the first output command matches the first attribute setting value or the second attribute setting value. In response to the attribute information of the first output command matching the first attribute setting value, the first bridge control circuit provides the first output command to the first peripheral circuit. In response to the attribute information of the first output command matching the second attribute setting value, the first peripheral circuit provides the first output command to the second peripheral circuit.

Abstract: A system on chip including a first peripheral circuit, a second peripheral circuit, and a first bridge control circuit is provided. The first bridge control circuit stores a first attribute setting value and a second attribute setting value and determines whether the attribute information of the first output command matches the first attribute setting value or the second attribute setting value. In response to the attribute information of the first output command matching the first attribute setting value, the first bridge control circuit provides the first output command to the first peripheral circuit. In response to the attribute information of the first output command matching the second attribute setting value, the first peripheral circuit provides the first output command to the second peripheral circuit.

Abstract: An encryption/decryption apparatus and an encryption/decryption method thereof are provided. A data encryption/decryption unit performs an encryption/decryption operation to a digital data and thus generates an encryption/decryption power signal corresponding to the encryption/decryption operation. A complementary power generating unit generates a complementary power signal corresponding to the encryption/decryption power signal. The encryption/decryption apparatus outputs the complementary power signal and the encryption/decryption power signal as a power signal, wherein a sum of the complementary power signal and the encryption/decryption power signal is a fixed value.

Abstract: A circuit and a method for generating a random number are provided. The circuit for generating the random number includes an analog-to-digital converter and a controller. The analog-to-digital converter sequentially generates a plurality of digital data in response to an analog signal. The controller utilizes an estimation procedure to sequentially analyze a variation trend of the plurality of digital data in a time sequence or extract components of the plurality of digital data within a preset frequency band. In addition, the controller generates a true random number based on a result of the estimation procedure.

Abstract: A circuit and a method for generating a random number are provided. The circuit for generating the random number includes an analog-to-digital converter and a controller. The analog-to-digital converter sequentially generates a plurality of digital data in response to an analog signal. The controller utilizes an estimation procedure to sequentially analyze a variation trend of the plurality of digital data in a time sequence or extract components of the plurality of digital data within a preset frequency band. In addition, the controller generates a true random number based on a result of the estimation procedure.