Patents by Inventor Shun Hu
Shun Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240092415Abstract: An HOD device, comprising: a framework; covering material, covering the frame work; at least one conductive region, provided on or in the covering material; wherein the conductive region is coupled to a capacitance detection circuit or a predetermined voltage level. The HOD device can be a vehicle control device such as a steering wheel. The conductive region comprises conductive wires which can be threads of the covering material. By this way, the arrangements of the conductive wires can be changed corresponding to the size or the shape of the frame work or any other requirements. Also, the interference caused by unstable factors can be improved since the conductive wires can be coupled to a ground source of the vehicle to provide a short capacitance sensing path.Type: ApplicationFiled: September 21, 2022Publication date: March 21, 2024Applicant: PixArt Imaging Inc.Inventors: Chin-Hua Hu, Ching-Shun Chen, Yu-Han Chen, Yu-Sheng Lin
-
Publication number: 20240043563Abstract: Disclosed are an antibody that can bind to human MASP-2, a preparation method therefor and an application thereof. The anti-human MASP-2 antibody of the present invention can specifically bind to human MASP-2, has good biological activity of inhibiting the cleavage of C4 and the generation of C3b, and can be applied in the treatment of MASP-2 related diseases, such as IgA nephropathy.Type: ApplicationFiled: October 13, 2023Publication date: February 8, 2024Inventors: Yipan WU, Wei DANG, Chenghai ZHANG, Lingqiao ZHU, Jinlin GUO, Yujing YUAN, Qiuling ZOU, Yang WANG, Shun HU
-
Patent number: 11876049Abstract: Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a method for forming a semiconductor device is disclosed. A first device layer is formed on a first substrate. A first bonding layer including a first bonding contact and a first bonding alignment mark is formed above the first device layer. A second device layer is formed on a second substrate. A second bonding layer including a second bonding contact and a second bonding alignment mark is formed above the second device layer. The first bonding alignment mark is aligned with the second bonding alignment mark, such that the first bonding contact is aligned with the second bonding contact. The first substrate and the second substrate are bonded in a face-to-face manner, so that the first bonding contact is in contact with the second bonding contact at a bonding interface, and the first bonding alignment mark is in contact with the second bonding alignment mark at the bonding interface.Type: GrantFiled: November 21, 2020Date of Patent: January 16, 2024Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.Inventors: Meng Yan, Jia Wen Wang, Si Ping Hu, Shun Hu
-
Patent number: 11793470Abstract: A method for calibrating measurements of human physiological state applied on an electronic device couples the device to at least one uncalibrated measurement device, worn or placed. Readings of a physiological state are collected by the uncalibrated measurement device and the readings are input into a model for calibration. A sub-module corresponding to the type of reading, for blood pressure or heart rate for example, is called up from the calibration model and a regression algorithm is applied to the calibration model to generate a calibrated reading, each sub-module in the model corresponding to one type of reading. The method also outputs calibrated physiological measurements by the called-up sub-module. A related electronic device and a non-transitory storage medium are also disclosed.Type: GrantFiled: September 23, 2020Date of Patent: October 24, 2023Assignee: Jiangyu Kangjian Innovation Medical Technology(Chengdu) Co., LtdInventors: Cheng Chen, Ping-Hao Liu, Neng-De Xiang, Ming-Shun Hu
-
Publication number: 20220173038Abstract: Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a bonded structure includes a first bonding layer including a first bonding contact and a first bonding alignment mark, a second bonding layer including a second bonding contact and a second bonding alignment mark, and a bonding interface between the first bonding layer and the second bonding layer. The first bonding alignment mark is aligned with the second bonding alignment mark at the bonding interface, such that the first bonding contact is aligned with the second bonding contact at the bonding interface. The first bonding alignment mark includes a plurality of first repetitive patterns. The second bonding alignment mark includes a plurality of second repetitive patterns different from the plurality of first repetitive patterns.Type: ApplicationFiled: February 17, 2022Publication date: June 2, 2022Inventors: Meng Yan, Jia Wen Wang, Si Ping Hu, Shun Hu
-
Patent number: 11289422Abstract: Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first semiconductor structure, a second semiconductor structure, and a bonding interface between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure includes a substrate, a first device layer disposed on the substrate, and a first bonding layer disposed above the first device layer and including a first bonding contact and a first bonding alignment mark. The second semiconductor structure includes a second device layer, and a second bonding layer disposed below the second device layer and including a second bonding contact and a second bonding alignment mark. The first bonding alignment mark is aligned with the second bonding alignment mark at the bonding interface, such that the first bonding contact is aligned with the second bonding contact at the bonding interface.Type: GrantFiled: December 12, 2018Date of Patent: March 29, 2022Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.Inventors: Meng Yan, Jia Wen Wang, Si Ping Hu, Shun Hu
-
Patent number: 11188705Abstract: An efficient electronic structure for circuit design, testing and/or manufacture for validating a cell layout design using an intelligent engine trained using selectively arranged cells selected from a cell library. An initial design rule violation (DRV) prediction engine is initially trained using a plurality of pin patterns generated by predefined cell placement combinations, where pin patterns are pixelized and quantified and is classified as either (i) a DRV pin pattern (i.e., pin patterns likely to produce a DRV) or (ii) a DRV-clean pin pattern (i.e., pin patterns unlikely to produce a DRV).Type: GrantFiled: May 15, 2020Date of Patent: November 30, 2021Assignee: Synopsys, Inc.Inventors: Tao-Chun Yu, Hsien-Shih Chiu, Shao-Yun Fang, Kai-Shun Hu, Philip Hui-Yuh Tai, Cindy Chin-Fang Shen, Henry Sheng
-
Publication number: 20210330268Abstract: A method for calibrating measurements of human physiological state applied on an electronic device couples the device to at least one uncalibrated measurement device, worn or placed. Readings of a physiological state are collected by the uncalibrated measurement device and the readings are input into a model for calibration. A sub-module corresponding to the type of reading, for blood pressure or heart rate for example, is called up from the calibration model and a regression algorithm is applied to the calibration model to generate a calibrated reading, each sub-module in the model corresponding to one type of reading. The method also outputs calibrated physiological measurements by the called-up sub-module. A related electronic device and a non-transitory storage medium are also disclosed.Type: ApplicationFiled: September 23, 2020Publication date: October 28, 2021Inventors: CHENG CHEN, PING-HAO LIU, NENG-DE XIANG, MING-SHUN HU
-
Publication number: 20210072653Abstract: Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a method for forming a semiconductor device is disclosed. A first device layer is formed on a first substrate. A first bonding layer including a first bonding contact and a first bonding alignment mark is formed above the first device layer. A second device layer is formed on a second substrate. A second bonding layer including a second bonding contact and a second bonding alignment mark is formed above the second device layer. The first bonding alignment mark is aligned with the second bonding alignment mark, such that the first bonding contact is aligned with the second bonding contact. The first substrate and the second substrate are bonded in a face-to-face manner, so that the first bonding contact is in contact with the second bonding contact at a bonding interface, and the first bonding alignment mark is in contact with the second bonding alignment mark at the bonding interface.Type: ApplicationFiled: November 21, 2020Publication date: March 11, 2021Inventors: Meng Yan, Jia Wen Wang, Si Ping Hu, Shun Hu
-
Publication number: 20200364394Abstract: An efficient electronic structure for circuit design, testing and/or manufacture for validating a cell layout design using an intelligent engine trained using selectively arranged cells selected from a cell library. An initial design rule violation (DRV) prediction engine is initially trained using a plurality of pin patterns generated by predefined cell placement combinations, where pin patterns are pixelized and quantified and is classified as either (i) a DRV pin pattern (i.e., pin patterns likely to produce a DRV) or (ii) a DRV-clean pin pattern (i.e., pin patterns unlikely to produce a DRV).Type: ApplicationFiled: May 15, 2020Publication date: November 19, 2020Inventors: Tao-Chun Yu, Hsien-Shih Chiu, Shao-Yun Fang, Kai-Shun Hu, Philip Hui-Yuh Tai, Cindy Chin-Fang Shen, Henry Sheng
-
Publication number: 20200159133Abstract: Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first semiconductor structure, a second semiconductor structure, and a bonding interface between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure includes a substrate, a first device layer disposed on the substrate, and a first bonding layer disposed above the first device layer and including a first bonding contact and a first bonding alignment mark. The second semiconductor structure includes a second device layer, and a second bonding layer disposed below the second device layer and including a second bonding contact and a second bonding alignment mark. The first bonding alignment mark is aligned with the second bonding alignment mark at the bonding interface, such that the first bonding contact is aligned with the second bonding contact at the bonding interface.Type: ApplicationFiled: December 12, 2018Publication date: May 21, 2020Inventors: Meng Yan, Jia Wen Wang, Si Ping Hu, Shun Hu
-
Publication number: 20190302992Abstract: A method for a smart terminal to interact with a robot includes generating an editing interface on a display device of the smart terminal, the editing interface comprising an action editing area, an expression editing area, a sound editing area, and an execution setting area. Actions are determinable, a visible expression is determinable, and sounds are also determinable by user. A manner of execution of such interaction contents can also be set. Such edited interaction content can be sent to the robot and executed accordingly.Type: ApplicationFiled: April 27, 2018Publication date: October 3, 2019Inventors: XUE-QIN ZHANG, NENG-DE XIANG, MING-SHUN HU
-
Patent number: 10286933Abstract: The present invention discloses a honeycomb type cowcatcher and energy absorber for rail transit vehicles, comprising a high rigidity supporting back frame for cowcatcher and energy absorber, arranged detachably on a frame body of rail transit vehicle; at least one honeycomb type cowcatcher and energy absorber unit fixedly screwed on supporting back frame, applied to absorbing an impact energy generated by collision through plastic deformation; the honeycomb type unit comprises honeycomb structured accommodation cavity, where a honeycomb structure arranged. Through a method of mounting a honeycomb type unit onto the high rigidity supporting back frame, the present invention makes part of energy have been absorbed by the unit before a rigid collision between obstacle and train body happens, thus weakens a relatively large impact afforded by train body, therefore, decreases a damage from obstacle to train body.Type: GrantFiled: June 13, 2016Date of Patent: May 14, 2019Assignee: SHENZHEN CANSINGA TECHNOLOGY CO., LTDInventors: Changjie Luo, Wenze Yu, Zhaojing Liu, Shun Hu
-
Patent number: 9881118Abstract: A method for routing a circuit device having an array of bump pads includes identifying a routing direction associated with a bump, generating a power strap and a ground strap based on the routing direction, forming a routing channel in accordance with the routing direction, setting a start point and an endpoint in the routing channel, and connecting the start point and the endpoint using a wire within the routing channel. The method further includes placing the start point to a power or ground strap in response to a target power/ground ratio.Type: GrantFiled: December 18, 2014Date of Patent: January 30, 2018Assignee: SYNOPSYS, INC.Inventors: Hsien-Shih Chiu, Kai-Shun Hu
-
Publication number: 20170341664Abstract: The present invention discloses a honeycomb type cowcatcher and energy absorber for rail transit vehicles, comprising a high rigidity supporting back frame for cowcatcher and energy absorber, arranged detachably on a frame body of rail transit vehicle; at least one honeycomb type cowcatcher and energy absorber unit fixedly screwed on supporting back frame, applied to absorbing an impact energy generated by collision through plastic deformation; the honeycomb type unit comprises honeycomb structured accommodation cavity, where a honeycomb structure arranged. Through a method of mounting a honeycomb type unit onto the high rigidity supporting back frame, the present invention makes part of energy have been absorbed by the unit before a rigid collision between obstacle and train body happens, thus weakens a relatively large impact afforded by train body, therefore, decreases a damage from obstacle to train body.Type: ApplicationFiled: June 13, 2016Publication date: November 30, 2017Inventors: Changjie LUO, Wenze YU, Zhaojing LIU, Shun HU
-
Patent number: 9721056Abstract: A method for designing an integrated circuit (IC) includes, in part, dividing the wires disposed in the IC into a multitude of segments each having a length extending from a first end point to a second end point. Each segment is then widened without overlapping any adjacent object. As an example, an intermediate, or expanded, segment is formed that includes the first and the second end points and has a size to overlap with an adjacent object. The method includes identifying regions in the adjacent objects that overlap with the expanded segment. For each of the identified regions, an expanded region is formed, which has a shape and size to enclose the identified object with additional spacing around the perimeter. Next, the size of the expanded segment is reduced to form the wide segment such that the wide segment does not overlap any of the adjacent expanded objects.Type: GrantFiled: December 18, 2014Date of Patent: August 1, 2017Assignee: SYNOPSYS, INC.Inventors: Hsien-Shih Chiu, Kai-Shun Hu
-
Publication number: 20150278421Abstract: A method for routing a circuit device having an array of bump pads includes identifying a routing direction associated with a bump, generating a power strap and a ground strap based on the routing direction, forming a routing channel in accordance with the routing direction, setting a start point and an endpoint in the routing channel, and connecting the start point and the endpoint using a wire within the routing channel. The method further includes placing the start point to a power or ground strap in response to a target power/ground ratio.Type: ApplicationFiled: December 18, 2014Publication date: October 1, 2015Inventors: HSIEN-SHIH CHIU, KAI-SHUN HU
-
Publication number: 20150178441Abstract: A method for designing an integrated circuit (IC) includes, in part, dividing the wires disposed in the IC into a multitude of segments each having a length extending from a first end point to a second end point. Each segment is then widened without overlapping any adjacent object. As an example, an intermediate, or expanded, segment is formed that includes the first and the second end points and has a size to overlap with an adjacent object. The method includes identifying regions in the adjacent objects that overlap with the expanded segment. For each of the identified regions, an expanded region is formed, which has a shape and size to enclose the identified object with additional spacing around the perimeter. Next, the size of the expanded segment is reduced to form the wide segment such that the wide segment does not overlap any of the adjacent expanded objects.Type: ApplicationFiled: December 18, 2014Publication date: June 25, 2015Inventors: HSIEN-SHIH CHIU, KAI-SHUN HU
-
Patent number: 9018938Abstract: An integrated device suspended at a high voltage potential for the metering and protection of a distribution network comprises a measurement current transformer (CT), a protective CT and a voltage sensor. The voltage signal is output from the voltage sensor to an electric energy metering module and first and second electric signal acquiring modules. The current signal acquired by the measurement CT is output to the electric energy metering module. The current signal acquired by the protective CT is output to the first and second electric signal acquiring modules. The electric energy metering module processes the current and voltage signals and sends the processed data to a comprehensive control module. The first and second electric signal acquiring modules send the voltage and current data to the comprehensive control module. The comprehensive control module comprehensively calculates the received data and sends the result to a low voltage terminal.Type: GrantFiled: April 25, 2011Date of Patent: April 28, 2015Assignee: Wuhan Guoce Science & Technology Co., Ltd.Inventors: Tiexin Hou, Zhengliang Bu, Shun Hu, Zhigui Xu, Youyi Li, Zhengtao Zhao, Leping Zhang
-
Publication number: 20130213299Abstract: A liquid tank includes at least one main tank, a supplemental tank and a transmission module. The main tank is supplied with a first liquid. The supplemental tank is supplied with a second liquid. The transmission module is connected between the supplemental tank and the at least one main tank. The transmission module is configured to supply the second liquid into the main tank while the first liquid in the main tank is lowered down to a first position, and to stop supplying the second liquid into the main tank while the first liquid in the main tank is raised up to the first position. A thin film deposition apparatus using the aforementioned liquid tank is also provided.Type: ApplicationFiled: August 30, 2012Publication date: August 22, 2013Applicant: PINECONE MATERIAL INC.Inventors: FU-SHUN HU, CHIH-CHIEH CHU, HENG LIU