Patents by Inventor Shuna Xu

Shuna Xu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10482039
    Abstract: A method for DRAM protection comprises allocating address spaces respectively for a first and second common region, a first and second secure region; detecting whether common data has an address within the address spaces for the first secure region; outputting a digital signal remapping an address of the common data to the address space for the second common region if yes; detecting whether secure data has an address within the address spaces for the first common region; outputting a digital signal indicating remapping an address of the secure data to the address space for the second secure region if yes. Alternatively, the method further comprises generating a random key; an updated written data by permuting orders of bits of an original DRAM written data; generating an encrypted data by performing a function on the updated written data with the generated random key; and dynamically updating the generated random key.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: November 19, 2019
    Assignee: Montage Technology Co., Ltd.
    Inventors: Shuna Xu, Guobing Mo, Cheng-Tie Chen
  • Patent number: 10331577
    Abstract: A method for DRAM protection comprises allocating address spaces respectively for a first and second common region, a first and second secure region; detecting whether common data has an address within the address spaces for the first secure region; outputting a digital signal remapping an address of the common data to the address space for the second common region if yes; detecting whether secure data has an address within the address spaces for the first common region; outputting a digital signal indicating remapping an address of the secure data to the address space for the second secure region if yes. Alternatively, the method further comprises generating a random key; an updated written data by permuting orders of bits of an original DRAM written data; generating an encrypted data by performing a function on the updated written data with the generated random key; and dynamically updating the generated random key.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: June 25, 2019
    Assignee: MONTAGE TECHNOLOGY CO., LTD.
    Inventors: Shuna Xu, Guobing Mo, Cheng-Tie Chen
  • Patent number: 9740561
    Abstract: A one-time programmable (OTP) memory device includes a memory array. The memory array includes: a data storage section for storing application data; a verification information section including at least one verification information unit, wherein each verification information unit includes a verification address region for storing verification address information associated with an address of a subject region in the data storage section, and a reference verification data region for storing one or more reference verification data, and wherein each reference verification data is calculated through reference verification calculation on the application data stored in the subject region using a predetermined verification algorithm.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: August 22, 2017
    Assignee: MONTAGE TECHNOLOGY (SHANGHAI) CO., LTD.
    Inventors: Guobing Mo, Shuna Xu, Cheng-Tie Chen
  • Publication number: 20170185539
    Abstract: A method for DRAM protection comprises allocating address spaces respectively for a first and second common region, a first and second secure region; detecting whether common data has an address within the address spaces for the first secure region; outputting a digital signal remapping an address of the common data to the address space for the second common region if yes; detecting whether secure data has an address within the address spaces for the first common region; outputting a digital signal indicating remapping an address of the secure data to the address space for the second secure region if yes. Alternatively, the method further comprises generating a random key; an updated written data by permuting orders of bits of an original DRAM written data; generating an encrypted data by performing a function on the updated written data with the generated random key; and dynamically updating the generated random key.
    Type: Application
    Filed: March 14, 2016
    Publication date: June 29, 2017
    Applicant: Montage Technology (Shanghai) Co., Ltd.
    Inventors: Shuna XU, Guobing MO, Cheng-Tie Chen
  • Publication number: 20170132078
    Abstract: A one-time programmable (OTP) memory device includes a memory array. The memory array includes: a data storage section for storing application data; a verification information section including at least one verification information unit, wherein each verification information unit includes a verification address region for storing verification address information associated with an address of a subject region in the data storage section, and a reference verification data region for storing one or more reference verification data, and wherein each reference verification data is calculated through reference verification calculation on the application data stored in the subject region using a predetermined verification algorithm.
    Type: Application
    Filed: February 3, 2016
    Publication date: May 11, 2017
    Inventors: Guobing Mo, Shuna Xu, Cheng-Tie Chen