Abstract: A computer system security apparatus and a security method thereof, the apparatus including a recognition unit to recognize identification information of a user; an operation unit to produce a result value by executing a predetermined operation on the identification information of the user and unique identification information of the computer system; and a main control unit to execute a booting of the computer system according to whether a preset password of the computer system and the result value are the same.

Abstract: A computer system security apparatus and a security method thereof, the apparatus including a recognition unit to recognize identification information of a user; an operation unit to produce a result value by executing a predetermined operation on the identification information of the user and unique identification information of the computer system; and a main control unit to execute a booting of the computer system according to whether a preset password of the computer system and the result value are the same.

Abstract: A computer system including a display having a digital receiving connector receiving a digital video signal according to a predetermined digital video interface, and a display module displaying a picture based on the digital video signal received from the digital receiving connector, a computer separated from the display and including a digital transmitting connector based on the digital video interface and a graphic controller outputting the digital video signal through the digital transmitting connector, and a digital video cable including a first video connector connected to the digital receiving connector and a second video connector connected to the digital transmitting connector, and through which the digital video signal is transmitted from the computer to the display. With this configuration, the present invention provides a computer system, in which a computer and a display are simplified in configurations, and loss in a video signal is decreased.

Abstract: A method and device for controlling a CPU stop clock interrupt of a computer system. The device includes an idle detector and a control processor. A CPU having a stop clock interrupt mode receives a stop clock interrupt signal and sets up and clears the stop clock interrupt mode according to a logic state of the stop clock interrupt signal. The control processor receives a signal representing an idle condition of the computer system from the idle detector, a signal for enabling idle detector control of the CPU stop clock interrupt mode and a signal for forcing the CPU to resume a normal mode by clearing the stop clock interrupt mode. The idle condition can be defined by a computer user according to a selection of predetermined times during which no user inputs are received by the computer system.

Abstract: A computer system includes: a host unit, a power management system, a data backup power supply, a switching mode power supply, an auxiliary storage unit and a memory. The power management system generates a hibernation signal when an event is not generated from peripheral devices for a predetermined time period, a battery driving signal is output from the data backup power supply due to a power-off operation, or a command word is generated in accordance with performing a scheduled program. The host unit backs up the current operational environment and data in the auxiliary memory storage unit according to the hibernation signal, and outputs a powerdown command word so that the power management system interrupts the system power supply by outputting a main power cut-off signal or outputting a battery power cut-off signal according to the powerdown command word.

Abstract: A method and device for controlling a CPU stop clock interrupt of a computer system. The device includes an idle detector and a control processor. A CPU having a stop clock interrupt mode receives a stop clock interrupt signal and initiates and terminates the stop clock interrupt mode according to a logic state of the stop clock interrupt signal. The control processor receives a signal representing an idle condition of the computer system from the idle detector, an alternate signal for idle detector control of the CPU stop clock interrupt mode, and a control signal for forcing the CPU to resume a normal mode by clearing the stop clock interrupt mode. The idle condition can be defined by a computer user according to a selection of predetermined times during which no user inputs are received by the computer system.

Abstract: A hibernation system of a computer employing option cards responds to a hibernation interrupt signal generated by a power management system in case of power failure or a period of non-use. In response, an operation controller backs up the present data and outputs a power supply cut-off signal. A basic input/output system calls a software interrupt for storing data when a hibernation suspension function is performed by the operation controller, and calls a software interrupt for restoring data when a hibernation resume function is performed.

Abstract: A network hibernation system for use with a computer connected to a local area network. (LAN) which is capable of retaining both data from the computer and data from the network environment created in connection with the LAN in the event of a power failure and also in the event that the computer is idle for a predetermined time period. Upon the restoration of power, the states of the computer and network hibernation system are resumed to the point before the occurrence of the power failure or the idle period.

Abstract: A peripheral device input-initiated resume system for a combined hibernation system and back-up power supply for a computer comprises a keyboard controller for inputting an appropriate signal to the operating condition based on the key selected by a user, a power management system for outputting a wake-up signal if the signal is inputted from the keyboard or other input devices, a data back-up power unit for supplying DC voltage in case the power is cut-off suddenly or a user does not use the computer for a predetermined time, a power supplying unit in which a switching-mode power supply SMPS converts the external source AC power at line voltage into DC power at a desired voltage and supplies that power to each device on the main board of the computer, thereby retrieving the previous work again by cutting off power of all devices, once the power is off or when a user does not use the computer for a predetermined time, and supplying the additional power only to the MICOM(Micro Computer) or keyboard controller