Abstract: An object of the present disclosure is to be able to further reduce the size of a substrate structure including a plurality of elements. The substrate structure includes: a base substrate that includes a first conductive plate and a second conductive plate; a first element connected to the first conductive plate and the second conductive plate; and a second element connected to the first conductive plate and the second conductive plate. The first conductive plate and the second conductive plate are disposed on the same plane on the base substrate in a state of being electrically insulated from each other, the first element is mounted on a first main surface of the base substrate, and the second element is mounted on a second main surface that is on the opposite side to the first main surface relative to the base substrate.

Abstract: An object of the present disclosure is to be able to further reduce the size of a substrate structure including a plurality of elements. The substrate structure includes: a base substrate that includes a first conductive plate and a second conductive plate; a first element connected to the first conductive plate and the second conductive plate; and a second element connected to the first conductive plate and the second conductive plate. The first conductive plate and the second conductive plate are disposed on the same plane on the base substrate in a state of being electrically insulated from each other, the first element is mounted on a first main surface of the base substrate, and the second element is mounted on a second main surface that is on the opposite side to the first main surface relative to the base substrate.

Abstract: A power circuit includes bus bars that are connected to terminals of an FET and are provided flush with each other, and a first insulation region arranged between the bus bars. The power circuit includes a bus bar to which the FET is fixed, a conductive sheet that is connected to another bus bar via a first connection portion and electrically connects source terminals of the FET to the other bus bar, and a second connection portion that is provided in the conductive sheet and electrically connects the source terminals to the other bus bar.

Abstract: Provided is a circuit board structure including a first circuit board having bus bars and a second circuit board arranged spaced apart from the first circuit board, multiple FET being arranged on the bus bars, and terminals of the multiple FETs being connected to the bus bars. The circuit board structure includes a conducting wire group sheet that covers a portion of the bus bar and is provided with multiple conducting wires that allow electricity to flow between gate terminals of the FETs and the second circuit board. The semiconductor element FETs, which are arranged side by side, are provided such that the gates terminals are arranged in the same direction with respect to the direction in which the semiconductor element FETs are arranged side by side.

Abstract: A power circuit includes multiple bus bars that are connected to multiple terminals of an FET, are provided flush with each other, and are each insulated from each other. The power circuit includes one bus bar that is connected to drain terminals of the FET, a solder fixing portion of the FET that is arranged on the bus bar, and another bus bar that is connected to source terminals of the FET via a conductive connection sheet.

Abstract: A power circuit is provided with two bus bars in a single plane connected to terminals of a plurality of FETs and includes an insulating region interposed between the bus bars, the power circuit including: a first conductive piece to which one group of the plurality of FETs is fixed; a second conductive piece to which another group of the plurality of FETs is fixed, wherein the plurality of FETs are alternately fixed to the first conductive piece and the second conductive piece.

Abstract: A power circuit includes bus bars that are connected to terminals of an FET and are provided flush with each other, and a first insulation region arranged between the bus bars. The power circuit includes a bus bar to which the FET is fixed, a conductive sheet that is connected to another bus bar via a first connection portion and electrically connects source terminals of the FET to the other bus bar, and a second connection portion that is provided in the conductive sheet and electrically connects the source terminals to the other bus bar.

Abstract: Provided is a circuit board structure including a first circuit board having bus bars and a second circuit board arranged spaced apart from the first circuit board, multiple FET being arranged on the bus bars, and terminals of the multiple FETs being connected to the bus bars. The circuit board structure includes a conducting wire group sheet that covers a portion of the bus bar and is provided with multiple conducting wires that allow electricity to flow between gate terminals of the FETs and the second circuit board. The semiconductor element FETs, which are arranged side by side, are provided such that the gates terminals are arranged in the same direction with respect to the direction in which the semiconductor element FETs are arranged side by side.

Abstract: Provided is a circuit board assembly including an electronic component that generates heat, and a thermistor that is mounted on a circuit board that is spaced apart from the electronic component and that detects the temperature of the electronic component. The circuit board assembly further includes a heat conductive pattern formed surrounding the thermistor, and a heat conductive member that conducts heat from the electronic component to the heat conductive pattern.

Abstract: Provided is a power distribution board including: a bus bar; and a heat dissipation member that is disposed on one side of the bus bar via an adhesive layer, wherein the bus bar includes a recess that is open to the adhesive layer side, and that is filled with a constituent material of the adhesive layer.

Abstract: A conductor is placed on a first placement portion of a heat dissipation member with an insulation member interposed therebetween. An FET is electrically connected to the conductor. When current flows between the drain and the source of the FET, the FET generates heat. A second placement portion of a circuit board is placed on the conductor. The conductor and the insulation member are sandwiched between the first placement portion and the second placement portion. In the heat dissipation member, a first extension portion extends from the first placement portion, and in the circuit board, a second extension portion extends from the second placement portion. The first extension portion is located opposite to and is spaced apart from the second extension portion, and a microcomputer is placed on an upper surface of the second extension portion. The microcomputer outputs a control signal for turning the FET ON or OFF.

Abstract: A conductor is placed on a first placement portion of a heat dissipation member with an insulation member interposed therebetween. An FET is electrically connected to the conductor. When current flows between the drain and the source of the FET, the FET generates heat. A second placement portion of a circuit board is placed on the conductor. The conductor and the insulation member are sandwiched between the first placement portion and the second placement portion. In the heat dissipation member, a first extension portion extends from the first placement portion, and in the circuit board, a second extension portion extends from the second placement portion. The first extension portion is located opposite to and is spaced apart from the second extension portion, and a microcomputer is placed on an upper surface of the second extension portion. The microcomputer outputs a control signal for turning the FET ON or OFF.

Abstract: Provided is a power distribution board including: a bus bar; and a heat dissipation member that is disposed on one side of the bus bar via an adhesive layer, wherein the bus bar includes a recess that is open to the adhesive layer side, and that is filled with a constituent material of the adhesive layer.

Abstract: Provided is a substrate unit configured to improve heat dissipation efficiency while preventing workability from degrading at the time of assembly. A substrate unit includes: a substrate that has one surface on having a conductive pattern, and includes an opening; a conductive member that includes a main portion is fixed to the other surface of the substrate, and at least one terminal of an electronic component is electrically connected via the opening; and a heat dissipation member is fixed to a surface of the conductive member opposite a substrate side surface thereof, wherein the conductive member is provided with an extension portion that extends from the main portion of the conductive member and to which an external device is to be electrically connected, the extension portion intersecting a plane that extends along the heat dissipation member.

Abstract: Provided is a substrate unit configured to improve heat dissipation efficiency while preventing workability from degrading at the time of assembly. A substrate unit includes: a substrate that has one surface on having a conductive pattern, and includes an opening; a conductive member that includes a main portion is fixed to the other surface of the substrate, and at least one terminal of an electronic component is electrically connected via the opening; and a heat dissipation member is fixed to a surface of the conductive member opposite a substrate side surface thereof, wherein the conductive member is provided with an extension portion that extends from the main portion of the conductive member and to which an external device is to be electrically connected, the extension portion intersecting a plane that extends along the heat dissipation member.