Patents by Inventor Shunichi Iimuro

Shunichi Iimuro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8343280
    Abstract: A method and system for multi-zone control of temperature for a substrate is described. The temperature control system comprises a heat exchanger coupled to two or more fluid channels in a substrate holder configured to support the substrate. The heat exchanger is configured to adjust the temperature of a heat transfer fluid flowing through the two or more fluid channels. The temperature control system further comprises a heat transfer unit having an inlet that is configured to receive heat transfer fluid from the heat exchanger at a bulk fluid temperature. Additionally, the heat transfer unit comprises a first outlet configured to couple a portion of the heat transfer fluid at a first temperature less than the bulk temperature to a first fluid channel of the two or more fluid channels, and a second outlet configured to couple a remaining portion of the heat transfer fluid at a second temperature greater than the bulk fluid temperature to a second fluid channel of the two or more fluid channels.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: January 1, 2013
    Assignee: Tokyo Electron Limited
    Inventor: Shunichi Iimuro
  • Publication number: 20080217293
    Abstract: Embodiments of apparatus and methods for performing high throughput non-plasma processing are generally described herein. Other embodiments may be described and claimed.
    Type: Application
    Filed: March 6, 2007
    Publication date: September 11, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Shunichi Iimuro
  • Publication number: 20070235134
    Abstract: A method and system for multi-zone control of temperature for a substrate is described. The temperature control system comprises a heat exchanger coupled to two or more fluid channels in a substrate holder configured to support the substrate. The heat exchanger is configured to adjust the temperature of a heat transfer fluid flowing through the two or more fluid channels. The temperature control system further comprises a heat transfer unit having an inlet that is configured to receive heat transfer fluid from the heat exchanger at a bulk fluid temperature. Additionally, the heat transfer unit comprises a first outlet configured to couple a portion of the heat transfer fluid at a first temperature less than the bulk temperature to a first fluid channel of the two or more fluid channels, and a second outlet configured to couple a remaining portion of the heat transfer fluid at a second temperature greater than the bulk fluid temperature to a second fluid channel of the two or more fluid channels.
    Type: Application
    Filed: March 28, 2006
    Publication date: October 11, 2007
    Inventor: Shunichi Iimuro
  • Publication number: 20040200804
    Abstract: A member of processing a quartz member for a plasma processing device capable of suppressing the production of particles at the beginning of the use thereof and the production of chips thereafter, the quartz member for the plasma processing device, and the plasma processing device having the quartz member mounted thereon, the method comprising the steps of removing a large number of cracks 155 produced, after a diamond grinding, in the quartz member 151 for the plasma processing device used for a shield ring and a focus ring by performing a surface processing with abrasive grains of, for example, #320 to 400 in grain size, and performing the surface processing by using abrasive grains of smaller grain size to remove ruptured layers 163 while maintaining irregularities capable of adhering and holding deposit thereto.
    Type: Application
    Filed: March 25, 2004
    Publication date: October 14, 2004
    Inventors: Norikazu Sugiyama, Hidehito Saegusa, Nobuyuki Okayama, Shunichi Iimuro, Kosuke Imafuku, Nobuyuki Nagayama, Kouji Mitsuhashi, Hiroyuki Nakayama, Yahui Huang
  • Patent number: 6589435
    Abstract: Contact holes (36a, 36b) are formed by means of plasma etching, such that the contact holes are formed from the top surface of a silicon oxide insulating film (31) down to a wiring layer (33a) at a deep position and a wiring layer (33b) at a shallow position, respectively, which are embedded in the insulating film (31). A process gas containing C4F8, CO, and Ar is used, while the process pressure is set to be from 30 to 60 mTorr, and the partial pressure of the C4F8 gas is set to be from 0.07 to 0.35 mTorr. Under these conditions, the process gas is turned into plasma, and the insulating film (31) is etched with the plasma to form the contact holes (36a, 36b).
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: July 8, 2003
    Assignee: Tokyo Electron Limited
    Inventors: Shin Okamoto, Shunichi Iimuro
  • Patent number: 6110287
    Abstract: A plasma processing method in which a high-frequency power is supplied to a processing chamber in which an object to be processed is mounted, thereby producing a plasma in the processing chamber, and the object is processed in an atmosphere of the plasma, wherein the high-frequency power is subjected to modulation by a low-frequency power. In one embodiment a plasma is produced in a processing chamber by using an electric power with a direction of current changed with passing of time, and the object to be processed is processed in an atmosphere of the plasma, wherein a power having a basic frequency is subjected to frequency modulation with a frequency equal to n-times (n=an integer) the basic frequency. In a plasma processing apparatus of the invention, while a process gas is supplied to a processing chamber via a first gas introducing hole formed in an electrode, an object to be processed, which is held on an opposed electrode, is subjected to plasma processing.
    Type: Grant
    Filed: April 28, 1997
    Date of Patent: August 29, 2000
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Izumi Arai, Yoshifumi Tahara, Hiroshi Nishikawa, Yoshinobu Mitano, Shunichi Iimuro, Kazuo Fukasawa, Yutaka Miura, Shozo Hosoda
  • Patent number: 5766498
    Abstract: A parallel-plate plasma etching apparatus includes a susceptor electrode and a shower electrode which are arranged in a process chamber. A semiconductor wafer is placed on the susceptor electrode. A shower region defined by a plurality of process gas supply holes is formed in the shower electrode. The shower electrode is cooled by a cooling block and causes an effective electrode portion of the shower electrode to have a temperature gradient such that a temperature at the central portion of the effective electrode portion is lower than a temperature at the peripheral portion of the effective electrode portion. The diameter of the shower region is selected to be smaller than the diameter of the wafer by 5 to 25% such that degradation of planar uniformity of a degree of etching anisotropy on the wafer caused by the temperature gradient of the effective electrode portion is compensated for.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: June 16, 1998
    Assignees: Hitachi, Ltd., Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Masayuki Kojima, Yoshikazu Ito, Kazushi Tomita, Shigeki Tozawa, Shunichi Iimuro, Masashi Arasawa, Eiichi Nishimura
  • Patent number: 5593540
    Abstract: The present invention provides a plasma etching system, comprising a process chamber enclosing a plasma, means for evacuating said process chamber, a chuck electrode for supporting a substrate, a shower electrode positioned to face said chuck electrode and provided with a large number of small holes, a power source for applying a plasma voltage between the chuck electrode and said shower electrode, gas supply means communicating with said small holes of the shower electrode for supplying a plasma-forming gas into the process chamber through the small holes, and means for controlling said gas supply means such that said plasma-forming gas flows through said small holes at a mass flow rate of at least 620 kg/m.sup.2 /hr.
    Type: Grant
    Filed: April 27, 1995
    Date of Patent: January 14, 1997
    Assignees: Hitachi, Ltd., Hitachi Tokyo Electronics Co., Ltd., Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Kazushi Tomita, Yoshikazu Ito, Motohiro Hirano, Akira Nozawa, Hiromitsu Matsuo, Shunichi Iimuro, Shigeki Tozawa, Yutaka Miura
  • Patent number: 5445709
    Abstract: A parallel-plate plasma etching apparatus includes a susceptor electrode and a shower electrode which are arranged in a process chamber. A semiconductor wafer is placed on the susceptor electrode. A shower region defined by a plurality of process gas supply holes is formed in the shower electrode. The shower electrode is cooled by a cooling block and causes an effective electrode portion of the shower electrode to have a temperature gradient such that a temperature at the central portion of the effective electrode portion is lower than a temperature at the peripheral portion of the effective electrode portion. The diameter of the shower region is selected to be smaller than the diameter of the wafer by 5 to 25% such that degradation of planar uniformity of a degree of etching anisotropy on the wafer caused by the temperature gradient of the effective electrode portion is compensated for.
    Type: Grant
    Filed: November 19, 1993
    Date of Patent: August 29, 1995
    Assignees: Hitachi, Ltd., Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Masayuki Kojima, Yoshikazu Ito, Kazuhsi Tomita, Shigeki Tozawa, Shunichi Iimuro, Masashi Arasawa, Eiichi Nishimura
  • Patent number: 5423936
    Abstract: The present invention provides a plasma etching system, comprising a process chamber enclosing a plasma, means for evacuating said process chamber, a chuck electrode for supporting a substrate, a shower electrode positioned to face said chuck electrode and provided with a large number of small holes, a power source for applying a plasma voltage between the chuck electrode and said shower electrode, gas supply means communicating with said small holes of the shower electrode for supplying a plasma-forming gas into the process chamber through the small holes, and means for controlling said gas supply means such that said plasma-forming gas flows through said small holes at a mass flow rate of at least 620 kg/m.sup.2 /hr.
    Type: Grant
    Filed: October 19, 1993
    Date of Patent: June 13, 1995
    Assignees: Hitachi, Ltd., Hitachi Tokyo Electronics, Co., Ltd., Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Kazushi Tomita, Yoshikazu Ito, Motohiro Hirano, Akira Nozawa, Hiromitsu Matsuo, Shunichi Iimuro, Shigeki Tozawa, Yutaka Miura
  • Patent number: 4812201
    Abstract: A method and an apparatus, both for ashing unnecessary layers such as a photoresist layer, formed on a semiconductor wafer, by applying ozone to the layer, are disclosed. An ashing gas containing oxygen atom radical, or containing oxygen gas and an ashing-promoting gas, is applied to the layer, thereby ashing the layer readily and efficiently. The surface temperature of the layer is set at a prescribed value, and the ashing gas is applied uniformly onto the entire surface of the layer, or onto a part thereof, thus ashing the whole layer, or a part thereof, uniformly at a high rate, and the end-point of the ashing process is detected, thereby to enhance the efficiency of the ashing process.
    Type: Grant
    Filed: July 15, 1987
    Date of Patent: March 14, 1989
    Assignee: Tokyo Electron Limited
    Inventors: Hiroyuki Sakai, Kazutoshi Yoshioka, Kimiharu Matsumura, Keisuke Shigaki, Yutaka Amemiya, Shunichi Iimuro, Haruhiko Yoshioka, Teruhiko Onoe