Patents by Inventor Shunichi Muto

Shunichi Muto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6235547
    Abstract: In a semiconductor device, concave sections in which an opening area becomes small in proportion as a depth becomes deep are formed in a crystal layer, and a quantum structure is formed on at least one crystal face of a bottom section of the concave section and a border formed between plural sidewalls thereof. In case the quantum structure is formed in the bottom section, a quantum box is formed therein. If the quantum structure is formed in the border between the sidewalls of the concave section, a quantum wire is formed therein. In case the quantum structure is formed in the sidewall of the concave section, a two-dimensional quantum well is formed therein.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: May 22, 2001
    Assignee: Fujitsu Limited
    Inventors: Yoshiki Sakuma, Yoshihiro Sugiyama, Shunichi Muto
  • Patent number: 6011271
    Abstract: In a semiconductor device, concave sections in which an opening area becomes small in proportion as a depth becomes deep are formed in a crystal layer, and a quantum structure is formed on at least one crystal face of a bottom section of the concave section and a border formed between plural sidewalls thereof. In case the quantum structure is formed in the bottom section, a quantum box is formed therein. If the quantum structure is formed in the border between the sidewalls of the concave section, a quantum wire is formed therein. In case the quantum structure is formed in the sidewall of the concave section, a two-dimensional quantum well is formed therein.
    Type: Grant
    Filed: July 9, 1996
    Date of Patent: January 4, 2000
    Assignee: Fujitsu Limited
    Inventors: Yoshiki Sakuma, Yoshihiro Sugiyama, Shunichi Muto
  • Patent number: 5650611
    Abstract: A light switching apparatus includes an optically non-linear etalon, a first optical part for applying a signal light of a linear polarization to the optically non-linear etalon, and a second optical part for applying a control light of a circular polarization or elliptical polarization to the optically non-linear etalon. The control light varies a refractive index of an optically non-linear substance of the optically non-linear etalon to thereby perform a switching operation on the signal light.
    Type: Grant
    Filed: August 14, 1995
    Date of Patent: July 22, 1997
    Assignee: Fujitsu Limited
    Inventors: Yuji Nishikawa, Atsushi Takeuchi, Shunichi Muto
  • Patent number: 5499206
    Abstract: A semiconductor optical memory device includes a semiconductor layer formed with a plurality of elemental recording areas each having a size generally equal to a wavelength of the optical beam. A plurality of quantized regions are formed in each elemental recording area of the semiconductor layer. Each of the quantized regions has a quantized energy level and absorbing an optical radiation of which wavelength is pertinent to the quantized energy level of that quantized region by forming first type carriers having a first polarity and second type carriers having a second, opposing polarity. Each of the quantized regions includes a semiconductor material confined in at least two mutually perpendicular directions to form the quantized energy level and has the optical absorption wavelength that is different from that of other quantized regions included in each elemental recording area.
    Type: Grant
    Filed: November 24, 1993
    Date of Patent: March 12, 1996
    Assignee: Fujitsu Limited
    Inventor: Shunichi Muto
  • Patent number: 5266814
    Abstract: A resonant-tunneling transistor comprises a first semiconductor layer acting as a collector, a second semiconductor layer provided on the first semiconductor layer and forming a potential barrier of electrons in the conduction band, a third semiconductor layer provided on the second semiconductor layer and forming a quantum well of electrons in the conduction band, a fourth semiconductor layer provided on the third semiconductor layer and forming a quantum well of holes in the valence band, the fourth semiconductor layer simultaneously forming a potential barrier of electrons in the conduction band, a fifth semiconductor layer provided on the fourth semiconductor layer acting as an emitter, a first electrode provided in contact with the first semiconductor layer for recovering electrons therefrom, a second electrode provided in contact with the fifth semiconductor layer for injecting electrons thereinto, and an optical passage for introducing an optical beam to the first semiconductor layer.
    Type: Grant
    Filed: September 10, 1991
    Date of Patent: November 30, 1993
    Assignee: Fujitsu Limited
    Inventors: Tsuguo Inata, Shunichi Muto
  • Patent number: 5225692
    Abstract: A non-linear semiconductor optical device comprises a first quantum well layer having discrete quantum levels of carriers including a first quantum level for electrons and a second quantum level for holes with an energy gap corresponding to a wavelength of an incident optical beam; a pair of barrier layers provided above and below the first quantum well layer in contact therewith with a thickness that allows a tunneling of the carriers therethrough for defining a potential well in correspondence to the first quantum well layer; and a second quantum well layer provided in contact with the barrier layers for accepting the carriers that have been created in the first quantum well layer upon excitation by the incident optical beam and escaped therefrom by tunneling through the barrier layer. The second quantum well layer comprises a material that has a conduction band including therein a .GAMMA. valley and an X valley, wherein said .GAMMA.
    Type: Grant
    Filed: March 27, 1992
    Date of Patent: July 6, 1993
    Assignee: Fujitsu Limited
    Inventors: Atsushi Takeuchi, Hideaki Ishikawa, Shunichi Muto
  • Patent number: 5216261
    Abstract: A non-linear optical device having the TBQ structure comprises an active layer forming a quantum well for interacting with an incident optical beam, an electron removal layer provided adjacent to the active layer at a first side thereof with a first barrier layer intervening therebetween for removing the electrons from the active layer; and a hole removal layer provided adjacent to the active layer at a second, opposite side of the active layer with a second barrier layer intervening therebetween for removing the holes from the active layer; wherein the first and second barrier layers have respective thicknesses determined such that the probability of tunneling of the electrons through the first barrier layer and the probability of tunneling of the holes through the second barrier layer are substantially equal with each other.
    Type: Grant
    Filed: December 19, 1991
    Date of Patent: June 1, 1993
    Assignee: Fujitsu Limited
    Inventors: Tsuguo Inata, Shunichi Muto
  • Patent number: 5175739
    Abstract: An optical semiconductor device comprises a first material layer having a first thickness and formed of a first semiconductor material having a first band gap; a first quantum level pair formed in the first material layer in correspondence to the first thickness with a first energy gap that corresponds to an energy of the incident optical beam to be modulated; a pair of second material layers each having a second, smaller thickness chosen to cause the tunneling of carriers through the second material layer, the second material layer being formed of a second, different semiconductor material having a second, larger band gap and provided at both sides of the first material layer; a third material layer having a third thickness larger than said first thickness and provided at least above or below the second material layer; a second quantum level pair formed in the third material layer in correspondence to the third thickness with a second energy gap that is smaller than the first energy gap; and a carrier annihi
    Type: Grant
    Filed: September 12, 1991
    Date of Patent: December 29, 1992
    Assignee: Fujitsu Limited
    Inventors: Atsushi Takeuchi, Shunichi Muto
  • Patent number: 5160993
    Abstract: In an optosemiconductor device including a superlattice configuration (TBQ) of first and second quantum well layers and a potential barrier therebetween, photo-excited carriers are formed in the first quantum well layer and are tunnelled through the potential barrier toward the second quantum well layer, so that the tunneled carriers are accumulated in the second quantum well layer. An electric field is applied to the superlattice configuration to expel the tunneled carriers from the second quantum well layer.
    Type: Grant
    Filed: June 6, 1991
    Date of Patent: November 3, 1992
    Assignee: Fujitsu Limited
    Inventors: Hideaki Ishikawa, Yoshihiro Sugiyama, Shunichi Muto, Toshio Fujii
  • Patent number: 5130766
    Abstract: A quantum interference type semiconductor device is composed of at least one bifurcated branch conductive channel with a heterojunction in a semiconductor with a band discontinuity that produced a potential well between two semiconductor regions into which a carrier is injected and from which a carrier is drained, at least one gate electrode is arranged at the side of the one bifurcated branch conduction channel, and a kind of filter using a resonance tunneling barrier arranged before or upstream of the semiconductor region into which a carrier is injected. The filter passes a carrier having a certain energy legvel to the channel whereby the level of the carrier traveling in the channel becomes equal to realize a good quantum interference effect.
    Type: Grant
    Filed: August 3, 1989
    Date of Patent: July 14, 1992
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Arimoto, Shunichi Muto, Shigehiko Sasa, Makoto Okada, Naoki Yokoyama
  • Patent number: 4929984
    Abstract: A resonant tunnelling barrier (RTB) structure device (e.g., diode), having a large peak-to-valley current density (Jp/Jv) ratio, includes an InP substrate and a RTB structure structure. The RTB structure is formed by a first doped layer of InP or In.sub.0.53 GA.sub.0.47 As, a first barrier layer of Al.sub.x Ga.sub.1-x As.sub.y Sb.sub.1-y (0.ltoreq.x.ltoreq.1, y=0.51+0.05x), a well layer of InP or In.sub.z Ga.sub.1-z As (0.52.ltoreq.z.ltoreq.0.54), a second barrier layer of the AlGaAsSb, and a second doped layer of InP or In.sub.z Ga.sub.1-z As. The layers of the RTB structure are lattice-matched to InP.
    Type: Grant
    Filed: November 1, 1988
    Date of Patent: May 29, 1990
    Assignee: Fujitsu Limited
    Inventors: Shunichi Muto, Tsuguo Inata, Atsushi Takeuchi, Yoshihiro Sugiyama
  • Patent number: 4825264
    Abstract: A resonant tunneling semiconductor device having a large peak-to-valley current density J.sub.p /J.sub.v ratio comprises an InP substrate, a first contact compound semiconductor lattice-matched to Inp, a first barrier layer of (In.sub.0.52 Al.sub.0.48 As).sub.z (In.sub.0.53 Ga.sub.0.47 As).sub.1-z, (0<z.ltoreq.1), a well layer of In.sub.1-y Ga.sub.y As, (0.48.gtoreq.y.gtoreq.0.46), a second barrier layer of (In.sub.0.52 Al.sub.0.48 As).sub.z -(In.sub.0.53 Ga.sub.0.47 As).sub.1-z, (0<z.ltoreq.1), and a second contact layer compound semiconductor lattice-matched to InP:The first and second barrier layers and the well layer forming a quantum-well structure.Instead of the quantum-well structure above, it is possible to adopt the quantum-well structure of strained-layers comprising first and second barrier layers which are of In.sub.1-x Al.sub.x As (0.48<x.ltoreq.1) and have a thickness of 0.5 to 10.0 nm.
    Type: Grant
    Filed: August 4, 1987
    Date of Patent: April 25, 1989
    Assignee: Fujitsu Limited
    Inventors: Tsuguo Inata, Shunichi Muto, Toshio Fujii
  • Patent number: 4786957
    Abstract: A negative differential resistance element, the characteristics of which can be modulated externally, is provided by a sequential arrangement of an n-type GaAs emitter layer, a non-doped AlGaAs first barrier layer, an n-type GaAs base layer, a second barrier layer of a superlattice composed of coupled non-doped AlAs and GaAs thin layers, and an n-type collector layer. The conductivity of the emitter, base, and collector layers may be changed to p-type.
    Type: Grant
    Filed: January 29, 1987
    Date of Patent: November 22, 1988
    Assignee: Director-General of Agency of Industrial Science and Technology
    Inventor: Shunichi Muto