Patents by Inventor Shunichi Seya

Shunichi Seya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Testing method for a semiconductor integrated circuit device, semiconductor integrated circuit device and testing system
    Publication number: 20100315116
    Abstract: A method that divides semiconductor integrated circuit devices (corresponding to S1 and S2) into a plurality of groups and tests them simultaneously has the semiconductor integrated circuit devices operate with a clock signal (corresponding to CLK1 and CLK2) having a frequency different from that in other groups in at least one group. A test is performed without decreasing the number of chips tested at one time.
    Type: Application
    Filed: May 27, 2010
    Publication date: December 16, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Shunichi Seya
  • Chattering eliminating apparatus including oscillation circuit using charging and discharging operations
    Patent number: 6873216
    Abstract: In a chattering eliminating apparatus, a coincidence circuit receives an input signal of the apparatus and an output signal of the apparatus to determine whether or not a level of the input signal of the apparatus is the same as a level of the output signal of the apparatus. An oscillation circuit carries out an oscillation operation only when the level of the input signal of the apparatus is not the same as the level of the output signal of the apparatus. A counter counts an output signal of the oscillation circuit, and is reset when the level of the input signal of the apparatus is the same as the level of the output signal of the apparatus. An output signal generating circuit inverts the level of the output signal of the apparatus when a counter value of the counter reaches a predetermined value.
    Type: Grant
    Filed: October 11, 2002
    Date of Patent: March 29, 2005
    Assignee: NEC Corporation
    Inventor: Shunichi Seya
  • Chattering eliminating apparatus including oscillation circuit using charging and discharging operations
    Publication number: 20030076182
    Abstract: In a chattering eliminating apparatus, a coincidence circuit receives an input signal of the apparatus and an output signal of the apparatus to determine whether or not a level of the input signal of the apparatus is the same as a level of the output signal of the apparatus. An oscillation circuit carries out an oscillation operation only when the level of the input signal of the apparatus is not the same as the level of the output signal of the apparatus. A counter counts an output signal of the oscillation circuit, and is reset when the level of the input signal of the apparatus is the same as the level of the output signal of the apparatus. An output signal generating circuit inverts the level of the output signal of the apparatus when a counter value of the counter reaches a predetermined value.
    Type: Application
    Filed: October 11, 2002
    Publication date: April 24, 2003
    Applicant: NEC Corporation
    Inventor: Shunichi Seya