Abstract: A clock regeneration circuit for regenerating a clock signal for demodulating data from an AM data multiplex modulated signal where digitally modulated signals are multiplexed in the same frequency band as those of an amplitude-modulated signal at the same time. The carrier for an amplitude-modulated signal is extracted from an AM data multiplex modulated signal where digitally modulated signals are multiplexed in the same frequency band as those of the amplitude-modulated signal at the same time through a band-pass filter, and the oscillation frequency of a voltage-controlled oscillator is controlled by the output of a phase comparator through a loop filter. The oscillation output of the voltage-controlled oscillator is supplied to a direct digital synthesizer and the phase of the carrier extracted through the band-pass filter is compared with the phase of the output of the direct digital synthesizer using the phase comparator.

Abstract: An MSK modulator providing a high precision digital phase adjustment with a simple circuit structure. A sample data of a sine wave or cosine wave is read from a memory at an address calculated from an initial address value. The initial address value is set in accordance with the amount of phase to be adjusted. A predetermined number of sample data read from the memory is held, outputted in a predetermined order, and converted into an analog signal. The phase of the converted analog signal is adjusted, and thereafter multiplied by an input baseband signal. The multiplied result is outputted as a modulation signal.