Patents by Inventor Shunichi WATABE

Shunichi WATABE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220336293
    Abstract: An inspection device is an inspection device that inspects a semiconductor substrate. The inspection device includes a stage, a first ring, and a second ring. A first recess is provided on an upper surface of the stage. The first recess has a ring shape in plan view. The first ring is elastic. The first ring is disposed in the first recess. The second ring presses the first ring in an inward direction of the ring shape so as to press the first ring toward an inner side surface of a side surface of the first recess. The first ring projects toward an upper side further than the upper surface of the stage. In the stage, an exhaust hole is provided. The semiconductor substrate placed on the first ring is vacuum-sucked with exhaustion through the exhaust hole.
    Type: Application
    Filed: February 1, 2022
    Publication date: October 20, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shunichi WATABE, Tamio MATSUMURA
  • Patent number: 10811368
    Abstract: According a method for manufacturing a semiconductor device of the present invention, a surface protection film having an elastic modulus of 2 GPa or more is formed on a first main surface of a semiconductor wafer where an element structure is formed, the semiconductor wafer is placed on a stage with the first main surface facing the stage, and a second main surface of the semiconductor wafer opposite to the first main surface is ground.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: October 20, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventor: Shunichi Watabe
  • Publication number: 20200083181
    Abstract: According a method for manufacturing a semiconductor device of the present invention, a surface protection film having an elastic modulus of 2 GPa or more is formed on a first main surface of a semiconductor wafer where an element structure is formed, the semiconductor wafer is placed on a stage with the first main surface facing the stage, and a second main surface of the semiconductor wafer opposite to the first main surface is ground.
    Type: Application
    Filed: July 10, 2019
    Publication date: March 12, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventor: Shunichi WATABE
  • Patent number: 9922944
    Abstract: A first film (3) is formed on a front surface of a semiconductor wafer (1). A second film (4) is formed on the first film (3). A surface protection film (5) is formed to cover the first film (3) and second film (4). After forming the surface protection film (5), a reverse surface of the semiconductor wafer (1) is etched with a chemical liquid. The first film (3) is formed on an outer peripheral section of the semiconductor wafer (1). The second film (4) is not formed on the outer peripheral section of the semiconductor wafer (1). The first film (3) and the surface protection film (5) are adhered to each other in the outer peripheral section of the semiconductor wafer (1). The first film (3) has a higher adhesion to the surface protection film (5) than the second film (4).
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: March 20, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventor: Shunichi Watabe
  • Publication number: 20170345777
    Abstract: A first film (3) is formed on a front surface of a semiconductor wafer (1). A second film (4) is formed on the first film (3). A surface protection film (5) is formed to cover the first film (3) and second film (4). After forming the surface protection film (5), a reverse surface of the semiconductor wafer (1) is etched with a chemical liquid. The first film (3) is formed on an outer peripheral section of the semiconductor wafer (1). The second film (4) is not formed on the outer peripheral section of the semiconductor wafer (1). The first film (3) and the surface protection film (5) are adhered to each other in the outer peripheral section of the semiconductor wafer (1). The first film (3) has a higher adhesion to the surface protection film (5) than the second film (4).
    Type: Application
    Filed: February 12, 2015
    Publication date: November 30, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventor: Shunichi WATABE