Abstract: A vertical deflection output circuitry for a television receiver wherein two transistors are connected in single ended and push-pull relation, and the output junction point of the two transistors is connected, to a D.C. power source for supplying a higher voltage than that of a power source for the vertical deflection output circuitry, through a switch which is turned off during the vertical scan period and turned on during the vertical retrace period.

Abstract: In a vertical deflection output circuit comprising two transistors connected in push-pull configuration, the junction point of the two transistors is connected through a series circuit of a capacitor and a vertical deflection coil, with a first power source and also connected through a switch, which is turned on during the vertical retrace period, with a second power source whose voltage is higher than that of the first power source, and one end of a bootstrap capacitor is connected with the junction point while the other end of the bootstrap capacitor is connected with the base of one of the two transistors and also connected through a resistor with the second power source, whereby the bootstrap capacitor is prevented from being exposed to a voltage whose polarity is opposite to that of the voltage developed across the bootstrap capacitor due to the charging thereof.