Patents by Inventor Shunji Kawaguchi

Shunji Kawaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9503699
    Abstract: The present technique relates to an imaging device and an imaging method, an electronic device, and a program, which are configured to improve an SN ratio by combining addition reading and thin-out reading by signal processing similar to signal processing using thin-out reading. First, as illustrated in the left side of the drawing, G pixel and B pixel, which are sub-colors, of the top row of regions Z1, Z2 are subjected to thin-out reading. Next, for W pixels of the main color arranged in a checkerboard pattern in the regions Z1, Z2, two pixels tied by a straight line in the drawing are subjected to addition reading at the same tone timing. For W pixels of the main color arranged in a checkerboard pattern in regions Z3, Z4, two pixels tied by a straight line in the drawing are also subjected to addition reading at the same tone timing. R and G pixels, which are sub-colors, of the lower stage of the regions Z3, Z4 are read.
    Type: Grant
    Filed: May 1, 2013
    Date of Patent: November 22, 2016
    Assignee: Sony Corporation
    Inventors: Shunji Kawaguchi, Isao Hirota, Hideki Shoyama
  • Patent number: 9432646
    Abstract: According to an embodiment of the present disclosure, there is provided an image processing apparatus including a comparing unit to perform comparison using at least one of a maximum value and an average value of luminance signals of an input image, with a saturation level as a reference of comparison, the saturation level being a level of light accumulation performed for a predetermined time length which is one of a plurality of time lengths for accumulating light in imaging of the input image; a tone curve generator to generate a tone curve to be used for performing compression processing to luminance gradation of the input image, on the basis of a result of the comparison being made; and a luminance gradation compression processor to perform compression processing to luminance gradation of the input image, according to the tone curve being generated.
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: August 30, 2016
    Assignee: Sony Corporation
    Inventor: Shunji Kawaguchi
  • Publication number: 20150208046
    Abstract: According to an embodiment of the present disclosure, there is provided an image processing apparatus including a comparing unit to perform comparison using at least one of a maximum value and an average value of luminance signals of an input image, with a saturation level as a reference of comparison, the saturation level being a level of light accumulation performed for a predetermined time length which is one of a plurality of time lengths for accumulating light in imaging of the input image; a tone curve generator to generate a tone curve to be used for performing compression processing to luminance gradation of the input image, on the basis of a result of the comparison being made; and a luminance gradation compression processor to perform compression processing to luminance gradation of the input image, according to the tone curve being generated.
    Type: Application
    Filed: January 15, 2015
    Publication date: July 23, 2015
    Inventor: Shunji Kawaguchi
  • Publication number: 20150138407
    Abstract: The present technique relates to an imaging device and an imaging method, an electronic device, and a program, which are configured to improve an SN ratio by combining addition reading and thin-out reading by signal processing similar to signal processing using thin-out reading. First, as illustrated in the left side of the drawing, G pixel and B pixel, which are sub-colors, of the top row of regions Z1, Z2 are subjected to thin-out reading. Next, for W pixels of the main color arranged in a checkerboard pattern in the regions Z1, Z2, two pixels tied by a straight line in the drawing are subjected to addition reading at the same tone timing. For W pixels of the main color arranged in a checkerboard pattern in regions Z3, Z4, two pixels tied by a straight line in the drawing are also subjected to addition reading at the same tone timing. R and G pixels, which are sub-colors, of the lower stage of the regions Z3, Z4 are read.
    Type: Application
    Filed: May 1, 2013
    Publication date: May 21, 2015
    Applicant: Sony Corporation
    Inventors: Shunji Kawaguchi, Isao Hirota, Hideki Shoyama
  • Publication number: 20110298955
    Abstract: A clock multiplying circuit includes: first and second inverters being ON/OFF-controlled by a positive- or negative-phase signal, respectively, of a first clock signal and including current source and current sync terminals; a capacitive element provided between output ends of the inverters; a current supplying unit increasing, if a frequency of the first clock signal increases, the control current and supplying the control current to the current source terminals of the inverters and outputting, from the current sync terminals of the inverters, a control current the same current amount as that of a control current to the current source terminal; a differential detecting unit receiving input of a potential difference signal between both electrodes of the capacitive element and generating a second clock signal having a phase difference of 90 degrees; and a multiplied-signal generating unit generating a double signal of the first clock signal on the basis of the clock signals.
    Type: Application
    Filed: April 26, 2011
    Publication date: December 8, 2011
    Applicant: Sony Corporation
    Inventors: Satsuki Horimoto, Shunji Kawaguchi, Shizunori Matsumoto
  • Patent number: 7859583
    Abstract: A solid state image capture device includes a pixel array unit having unit pixels including a photoelectric conversion element disposed in a matrix shape and analog/digital conversion means for converting an analog pixel signal read from the unit pixel of the pixel array unit into digital data. The analog/digital conversion means includes a comparator unit for converting a magnitude of the pixel signal into information in a time axis direction, a counter unit for performing a count process during a time period from a start time of a comparison process at the comparator unit to an end time of the comparison process, a multi-phase clock generate unit for generating multi-phase clocks having a constant phase difference, a latch unit for latching logic states of the multi-phase clocks, and a decode unit for decoding latch data of the latch unit to obtain a value lower than a count value.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: December 28, 2010
    Assignee: Sony Corporation
    Inventor: Shunji Kawaguchi
  • Patent number: 7508426
    Abstract: The present invention provides an image pickup device including a zoom function not using any optical means and capable of correcting a signal from a defective pixel based on positional information for the defective pixel previously stored therein.
    Type: Grant
    Filed: April 19, 2005
    Date of Patent: March 24, 2009
    Assignee: Sony Corporation
    Inventors: Shunji Kawaguchi, Daisuke Koyanagi, Azusa Takahashi
  • Publication number: 20090040352
    Abstract: A solid state image capture device includes a pixel array unit having unit pixels including a photoelectric conversion element disposed in a matrix shape and analog/digital conversion means for converting an analog pixel signal read from the unit pixel of the pixel array unit into digital data. The analog/digital conversion means includes a comparator unit for converting a magnitude of the pixel signal into information in a time axis direction, a counter unit for performing a count process during a time period from a start time of a comparison process at the comparator unit to an end time of the comparison process, a multi-phase clock generate unit for generating multi-phase clocks having a constant phase difference, a latch unit for latching logic states of the multi-phase clocks, and a decode unit for decoding latch data of the latch unit to obtain a value lower than a count value.
    Type: Application
    Filed: July 30, 2008
    Publication date: February 12, 2009
    Applicant: SONY CORPORATION
    Inventor: Shunji Kawaguchi
  • Publication number: 20050253938
    Abstract: The present invention provides an image pickup device including a zoom function not using any optical means and capable of correcting a signal from a defective pixel based on positional information for the defective pixel previously stored therein.
    Type: Application
    Filed: April 19, 2005
    Publication date: November 17, 2005
    Applicant: Sony Corporation
    Inventors: Shunji Kawaguchi, Daisuke Koyanagi, Azusa Takahashi