Patents by Inventor Shunji Minami

Shunji Minami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4760703
    Abstract: Several embodiments of induction systems for internal combustion engines that improve the charging efficiency, particularly at low speeds. Each embodiment employs a plenum chamber upstream of the engine throttle valve and a reed type check valve admits air to the plenum chamber so as to improve charging efficiency at low speeds by maintaining an air flow in the induction system. In accordance with some embodiments, a supercharger is also employed which discharges into the plenum chamber upstream of the throttle valve. This arrangement minimizes pulsation effects from the supercharger being transmitted to the engine intake ports. In addition, the reed type check valve can be employed in many of the embodiments to bypass the supercharger under conditions when the supercharger is not generating any significant boost. The location of the reed type check valve relative to the plenum chamber and throttle valve of the engine minimizes pulsations from being transmitted from the intake ports back to the check valve.
    Type: Grant
    Filed: October 19, 1981
    Date of Patent: August 2, 1988
    Assignee: Yamaha Hatsudoki Kabushiki Kaisha
    Inventors: Shunji Minami, Yasuo Nakao, Kazuhiko Nomura
  • Patent number: 4513725
    Abstract: Several embodiments of induction systems having forced induction and a regulated fuel pump for delivering fuel to the charge forming device at a pressure that is related to the pressure in the induction system. In some embodiments the pressure is sensed above the level of the fuel in the fuel bowl of the charge forming device, and in others the pressure is sensed in a plenum chamber upstream of the charge forming device inlet. A check valve arrangement is also provided in the fuel line in one embodiment for preventing the backflow of fuel under conditions when the engine is stopped.
    Type: Grant
    Filed: August 28, 1981
    Date of Patent: April 30, 1985
    Assignee: Yamaha Hatsudoki Kabushiki Kaisha
    Inventors: Shunji Minami, Hiroshi Kimura
  • Patent number: 4475617
    Abstract: Two embodiments of turbo-charged motorcycle arrangements wherein the turbo-charger is located so as to be protected by the stand of the motorcycle when the stand is in its retracted position.
    Type: Grant
    Filed: September 15, 1981
    Date of Patent: October 9, 1984
    Assignee: Yamaha Hatsudoki Kabushiki Kaisha
    Inventors: Shunji Minami, Hiroshi Kimura
  • Patent number: 4469189
    Abstract: A motorcycle construction embodying a turbo-charger that is fed by means of a collector pipe positioned beneath the engine. The turbo-charger is positioned between the engine and the rear wheels and a splash shield extends between the rear wheel and the turbo-charger so as to protect it.
    Type: Grant
    Filed: September 15, 1981
    Date of Patent: September 4, 1984
    Assignee: Yamaha Hatsudoki Kabushiki Kaisha
    Inventors: Shunji Minami, Hiroshi Kimura
  • Patent number: 4422295
    Abstract: A lubricating system for turbo-charger wherein the turbo-charger bearings are located at or below the normal level of oil in the lubricating sump for return of oil from the sump to the turbo-charger bearings when the engine is not running so as to insure cooling of the bearings when the engine is not running.
    Type: Grant
    Filed: October 1, 1981
    Date of Patent: December 27, 1983
    Assignee: Yamaha Motor Co., Ltd.
    Inventors: Shunji Minami, Hiroshi Kimura
  • Patent number: 4230074
    Abstract: A multiple bank internal engine for a motorcycle has staggered cylinders which form a recess at one side of one bank of cylinders, and another recess at the opposite ends of another bank of cylinders. Valve actuating mechanisms are accommodated in these recesses so as to minimize the axial length of the engine, and thereby minimizing the width of the envelope occupied by the engine when mounted on a motorcycle.
    Type: Grant
    Filed: September 21, 1978
    Date of Patent: October 28, 1980
    Assignee: Yamaha Hatsudoki Kabushiki Kaisha
    Inventors: Satoru Ichikawa, Shunji Minami
  • Patent number: 4211940
    Abstract: An electronic power control device including two R-S flip-flops, two diodes, an analog memory consisting of a MOS field-effect transistor, a nonpolarized capacitor and an analog switch, and a firing circuit interconnected between the ground and a trapezoidal waveform power level source, whereby a power delivered to a load may be stepped up or down instantaneously or may be maintained constant. When the load is an incandescent lamp, the latter may be instantaneously turned on or off by a simple "push-on" of a switch.
    Type: Grant
    Filed: April 20, 1978
    Date of Patent: July 8, 1980
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shunji Minami
  • Patent number: 4144484
    Abstract: A DC voltage control device comprising first and second R-S flip-flops, two diodes and an analog memory comprising a MOS field-effect transistor, a nonpolarized capacitor and an analog switch. The DC voltage may be increased, decreased and maintained at a desired level. Because of the analog memory, the signal level is stored or maintained even in case of power failure. The DC voltage control device may be used as a brightness control of an incandescent lamp, VCF (voltage controlled frequency) of a sweep generator and so on.
    Type: Grant
    Filed: December 27, 1977
    Date of Patent: March 13, 1979
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shunji Minami
  • Patent number: 4099251
    Abstract: Disclosed is an analog accumulator memory device of the type including a first and a second analog voltage memory devices each capable of holding an output voltage equal in magnitude to an input voltage. An output terminal of an inverter with a unit gain and an external input terminal are connected to an inverting input terminal and a noninverting input terminal, respectively, of a differential amplifier with a unit gain, the output terminal of which is connected to an input terminal of the first analog voltage memory device whose output terminal is connected to an input terminal of the second analog voltage memory device with its output terminal connected to an inverting input terminal of the inverter. Switching means is provided for alternately applying a gate signal to gate terminals of the first and second analog voltage memory devices, whereby an analog quantity (voltage in this case) at the external input terminal may be added to the sum of analog quantities stored in the accumulator device.
    Type: Grant
    Filed: December 27, 1976
    Date of Patent: July 4, 1978
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shunji Minami
  • Patent number: 4094007
    Abstract: In an analog voltage memory device of the type wherein a gate of a MOS field-effect transistor is connected to one terminal of analog switching means and to one terminal of a nonpolarized capacitor with the other terminal grounded, whereby a DC analog input voltage may be held as a source follower voltage of MOS field-effect transistor, adverse effects on the operation due to the variation in ambient temperature are eliminated by a constant current circuit including a NPN transistor. Variation in output due to the variation in ambient temperature may be minimized independently of drain current of MOS field-effect transistor, and drifts due to variation in ambient temperature of equipment and instruments such as pollution detectors and recorders which are installed outdoors may be reduced to a minimum. This analog voltage memory device is used as peak hold memory, sample-and-hold memory, zero-point memory, etc.
    Type: Grant
    Filed: November 26, 1976
    Date of Patent: June 6, 1978
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shunji Minami
  • Patent number: 4068136
    Abstract: Disclosed is an analog voltage memory device comprising a differential amplifier for deriving the difference between two analog inputs, an operational amplifier to which are applied the output of the differential amplifier and the source follower voltage of a MOS type field-effect transistor, switching means interconnected to the output terminal of the operational amplifier and the gate of the field-effect transistor, an output resistor interconnected between the source of the field-effect transistor and a negative power source or ground, and a nonpolarized capacitor interconnected between the gate of the field-effect transistor and a negative power source or ground, whereby the output voltage from the differential amplifier may be derived as the output voltage which is the source follower voltage of the field-effect transistor and is held.
    Type: Grant
    Filed: October 13, 1976
    Date of Patent: January 10, 1978
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shunji Minami
  • Patent number: 4053799
    Abstract: The invention discloses an analog voltage memory device comprising an operational amplifier, a reed relay, a capacitor and a MOSFET which are so interconnected to each other that the input voltage applied to the operational amplifier is compared with the output voltage from the MOSFET applied to the noninverting input terminal of the operational amplifier, thereby providing the output voltage whose magnitude follows the level of the input voltage and holds a desired level thereof for a long time. The analog voltage memory device may further include an additional operational amplifier which compares the input voltage with the output voltage and closes the reed relay only when the input voltage is higher than the output voltage so that the source follower output voltage from the MOSFET follows only the peak of the input voltage and remains at the level of this peak.
    Type: Grant
    Filed: May 5, 1976
    Date of Patent: October 11, 1977
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shunji Minami
  • Patent number: 4035668
    Abstract: The invention discloses an electronic input-interruption timer for use with an electrical appliance such as a washing machine, a fan, a refrigerator and so on. The timer comprises an integrator consisting of an input resistor and a capacitor, a switching element, a MOS field-effect transistor, a discharge resistor, and a switching circuit operable in response to the magnitude of the drain current of the field-effect transistor; the field-transistor, the switching element, the capacitor and the discharge resistor being embedded or potted in a molded plastic insulation. Since the capacitor and the discharge resistor are completely air- and water-tightly sealed, the highly reliable and dependable operation may be ensured even when used with a water-handling appliance such as a washing machine.
    Type: Grant
    Filed: March 17, 1976
    Date of Patent: July 12, 1977
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shunji Minami, Shunzo Oka
  • Patent number: 4032838
    Abstract: In a device of the type in which the output voltage derived from the source of a MOS field-effect transistor is varied in response to the voltage across a non-polarized capacitor connected to the gate of the field-effect transistor, positive and negative inputs are provided by two switching elements which are controlled in response to small DC signals. The device functions as a variable resistor, and is adapted to be remotely controlled.
    Type: Grant
    Filed: December 14, 1973
    Date of Patent: June 28, 1977
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shunji Minami, Takehide Takemura, Shunzo Oka
  • Patent number: 4027244
    Abstract: A remote control system including a variable resistor with switching means the variable resistor unit comprises a variable resistor and a switching means, said switching means being interlocked to said variable resistor such that said switching means is operated only when it is desired to adjust the variable resistor. With this variable resistor with switching means the operation of the switching means and adjustment of the variable resistor for volume control or the like can be effected through a single operation.
    Type: Grant
    Filed: June 27, 1975
    Date of Patent: May 31, 1977
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shunji Minami, Takehide Takemura, Shunzo Oka
  • Patent number: 4020420
    Abstract: The invention discloses an electronic channel selector which comprises a plurality of variable resistors, a plurality of switches connected to the variable resistors, respectively, and a voltage memory circuit. When one of the switches is closed, the output voltage of the variable resistor corresponding to the closed switch is transferred into and stored in the voltage memory circuit, and in response to the output voltage from the memory circuit the capacitance of a varactor may be varied for selecting a desired channel. The electronic channel selector in accordance with the present invention may be used instead of the conventional mechanical tuners, the channel selection may be much facilitated, the defects encountered in the conventional electronic channel selectors may be overcome, and any desired channel may be stored.
    Type: Grant
    Filed: March 17, 1976
    Date of Patent: April 26, 1977
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shunji Minami
  • Patent number: 3988596
    Abstract: A voltage memory device is disclosed wherein the gate of a MOS field-effect transistor is connected to one terminal of a capacitor and to an input voltage terminal through an input resistor and through the contacts of a reed relay while the source is connected to an output terminal and an output resistor, the input resistor being inserted in order to determine the charging time of the capacitor. When the reed relay is actuated, the capacitor is charged or discharged depending upon whether the input voltage terminal is connected to a positive or negative voltage supply source so that the output voltage increases or decreases. When the reed relay is de-energized, the output voltage remains at the same level. The voltage memory device has a function similar to that of the conventional variable resistors, but it eliminates the use of any sliding part and is operable at a relatively low voltage in a reliable and dependable manner. The voltage memory may be used in an automatic control system.
    Type: Grant
    Filed: March 14, 1975
    Date of Patent: October 26, 1976
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shunji Minami, Shunzo Oka
  • Patent number: 3952241
    Abstract: An electronic power varying controller device adapted for a dimmer, etc. and having substantially no mechanically sliding portions, comprising a thyristor connected with a load such as a lamp, a firing phase controller circuit for the thyristor, a field effect transistor for controlling the firing phase controller circuit, a capacitor connected in parallel with the gate circuit of the field effect transistor, a highly insulating switch connected in series to the gate of the field effect transistor, and a switch to be connected with the highly insulating switch for selecting a positive or negative potential.
    Type: Grant
    Filed: February 20, 1974
    Date of Patent: April 20, 1976
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takehide Takemura, Shunji Minami