Abstract: A decoder decodes an information bit sequence from a code sequence encoded by a polar code by using a successive cancellation list decoding method. The decoder includes a processor and a memory connected to the processor. The processor executes a process including configuring, to an independent value, a value of a parameter for limiting number of path candidates to sequentially identify candidates for an information bit sequence, for each position of an information bit in the information bit sequence or for each branch of an upper information bit to which a plurality of branches in a lower information bit is added.

Abstract: A wireless communications system including a mobile station MS and base stations BS1 and BS2, wherein one or both of the mobile station MS and the base stations BS1 and BS2 is provided with a unit for notifying information of a frame position with the possibility of transmission of packets based on detection of deterioration of a reception quality and wherein the mobile station MS is provided with a unit for determining a frame position without the possibility of transmission of packets and shifting to a peripheral cell detection mode at this frame position based on information of a frame position with the possibility of transmission of packets, whereby it is possible to shift to a peripheral cell detection mode without lowering the transmission efficiency and without complicating the processing.

Abstract: There is provided a distortion compensation apparatus for compensating a distortion of a power amplifier configured to amplify a transmission signal, the distortion compensation apparatus including a memory, and a processor coupled to the memory and the processor configured to acquire an average power of the transmission signal including a plurality of signal blocks by a signal block of the plurality of signal blocks, calculate a step coefficient value based on the acquired average power, and update a distortion compensation coefficient for compensating the distortion, based on an updating amount according to the calculated step coefficient value.

Abstract: A distortion compensation device includes a first table, a second table, a calculating unit, a first updating unit, and a second updating unit. The first table holds a coefficient of a nonlinear term included in a filtering coefficient associated with an address other than a prescribed address obtained from the input signal x(n). The second table holds a coefficient of a linear term related to the prescribed address. The calculating unit calculates, based on the output signal, each of the update amounts of the coefficient of the nonlinear term and the coefficient of the linear term. The first updating unit updates each of the coefficients in the first table based on the update amount of the coefficient of the nonlinear term. The second updating unit updates each of the coefficients of the second table based on the update amount of the coefficient of the linear term.

Abstract: A demodulator apparatus includes a memory and a processor coupled to the memory. The processor executes a process including: applying lattice reduction to a channel response matrix; applying linear detection to a reception signal in lattice-reduced basis using a lattice-reduced channel response matrix; calculating an expectation of a symbol in the lattice-reduced basis; inversely transforming the expectation of the symbol from the lattice-reduced basis into an original basis; and calculating soft-decision data by performing interference cancellation method in inversely transformed expectation of the symbol in the original basis.

Abstract: A decoding device includes a decoding unit that iteratively obtains a decoded bit stream corresponding to an information bit stream of one block, and an error detection unit that divides the decoded bit stream into a plurality of sub-blocks, acquires a plurality of partial remainders respectively corresponding to the sub-blocks, and determines whether an error occurs in the decoded bit stream based on a total remainder in which the partial remainders are added, wherein the error detection unit, of the sub-blocks, acquires a first partial remainder corresponding to a first sub-block including bits in which values are different between a previous decoded bit stream and a current decoded bit stream, and determines whether the error occurs in the current decoded bit stream based on a current total remainder obtained by adding the acquired first partial remainder to a previous total remainder.

Abstract: A demodulator apparatus includes a memory and a processor coupled to the memory. The processor executes a process including: applying lattice reduction to a channel response matrix; applying linear detection to a reception signal in lattice-reduced basis using a lattice-reduced channel response matrix; calculating an expectation of a symbol in the lattice-reduced basis; inversely transforming the expectation of the symbol from the lattice-reduced basis into an original basis; and calculating soft-decision data by performing interference cancellation method in inversely transformed expectation of the symbol in the original basis.

Abstract: A mobile user terminal, which communicates with a base station in an intermittent fashion, the mobile user terminal includes a radio transmitter which transmits downlink channel quality information indicating downlink channel quality and an uplink pilot signal to a base station in an intermittent fashion; and a transmit time controller which synchronizes transmit time of the downlink quality information and transmit time of the uplink pilot signal relative to each other, such that the downlink quality information and the uplink pilot signal are sent in adjacent different timings in a period corresponding to a state of intermittent communicate.

Abstract: A decoding device includes a decoding unit that iteratively obtains a decoded bit stream corresponding to an information bit stream of one block, and an error detection unit that divides the decoded bit stream into a plurality of sub-blocks, acquires a plurality of partial remainders respectively corresponding to the sub-blocks, and determines whether an error occurs in the decoded bit stream based on a total remainder in which the partial remainders are added, wherein the error detection unit, of the sub-blocks, acquires a first partial remainder corresponding to a first sub-block including bits in which values are different between a previous decoded bit stream and a current decoded bit stream, and determines whether the error occurs in the current decoded bit stream based on a current total remainder obtained by adding the acquired first partial remainder to a previous total remainder.

Abstract: An error detecting device includes a memory that stores therein first remainders corresponding to a plurality of bit positions p×P (p is an integer equal to or greater than zero) at a predetermined bit interval P among all of remainders obtained by dividing monomials, which correspond to the respective bit positions in a bit string represented by a polynomial, by a generator polynomial for generating an error detecting code, and a processor configured to acquire, from the memory, the first remainders corresponding to p×P of p×P+q (q is an integer equal to or greater than zero and smaller than P) representing normal bit positions of bits of 1 among all of the bits of an input bit string, obtain a cumulative addition result by shifting each of the acquired first remainders by q bits to obtain shift results.

Abstract: A receiver including: a memory, and a processor configured to calculate a plurality of soft decision values based on a received symbol to which a plurality of bits are mapped, to select at least one first soft decision value of the plurality of soft decision values, to calculate at least one relative value of at least one second soft decision value of the plurality of soft decision values other than the at least one first soft decision value, based on the at least one first soft decision value, to store the at least one first soft decision value and the at least one relative value, in the memory, and to estimate the plurality of bits based on the at least one first soft decision value and the at least one relative value which are stored in the memory.

Abstract: A rate adjustment apparatus includes a calculating section to calculate a number of outputs where bits of input data are sequentially output when a number of times of puncturing of the input data to be punctured is smaller than a number of remaining bits after puncturing, and a processing section to sequentially output bits of the input data and puncture the bits of the input data based on the number of outputs calculated by the calculating section.

Abstract: A mobile user terminal, which transmits downlink channel quality information indicating downlink channel quality and an uplink pilot signal to a base station, whereby a carrier frequency used for transmitting the downlink quality information and a carrier frequency used for transmitting the uplink pilot signal are selectable respectively from among a plurality of carrier frequencies assigned to the mobile user terminal; the mobile user terminal includes a radio transmitter, which transmits the downlink quality information and the uplink pilot signal in an intermittent fashion to the base station; and the radio transmitter transmits the downlink quality information and the uplink pilot signal by using a same carrier frequency among the plurality of carrier frequencies or by using adjacent carrier frequencies among the plurality of carrier frequencies, in a period corresponding to a state of intermittent communicate.

Abstract: A receiving device including: a demodulation circuit configured to generate first likelihood data of reception symbols based on a transmission format of the reception symbols, the transmission format being selected from transmission formats and including a modulation scheme applied to the reception symbols, the modulation scheme being one of amplitude modulation schemes, a processor configured to estimate a scale ratio of an implementation scale to a theoretical scale, the implementation scale being a scale of the first likelihood data, the theoretical scale being a scale of second likelihood data of the reception symbols, the second likelihood data being defined by a theory and not depending on an implementation of the receiving device, and to generate the second likelihood data based on the first likelihood data and the scale ratio, and a decoding circuit configured to decode the second likelihood data based on the transmission format.

Abstract: A decoding apparatus including an operation unit to calculate a branch metric between first and second instants of time based on receiving likelihood data and an anterior likelihood, and to use, in a state transition in a butterfly represented by first and second states at the first instant of time and third and fourth states at the second instant of time, a first anterior cumulative metric for the first state, a second anterior cumulative metric for the second state and a first difference based on the branch metric between the first state and the third state and on a second difference between the first anterior cumulative metric and the second anterior cumulative metric to calculate a third anterior cumulative metric for the third state and a fourth anterior cumulative metric for each butterfly and at each instant of time, and a storage unit to store the second difference.

Abstract: A decoding apparatus including an operation unit to calculate a branch metric between first and second instants of time based on receiving likelihood data and an anterior likelihood, and to use, in a state transition in a butterfly represented by first and second states at the first instant of time and third and fourth states at the second instant of time, a first anterior cumulative metric for the first state, a second anterior cumulative metric for the second state and a first difference based on the branch metric between the first state and the third state and on a second difference between the first anterior cumulative metric and the second anterior cumulative metric to calculate a third anterior cumulative metric for the third state and a fourth anterior cumulative metric for each butterfly and at each instant of time, and a storage unit to store the second difference.

Abstract: A radio communication device including: a processor configured to store each of quantization values of codeword to a memory in accordance with a transmission format, so as to fit each of the quantization values within a specified number of areas which are allocated in the memory, each of the areas having a specified size, and so as to satisfy at least one of a first condition and a second condition, the first condition indicating that the specified number is fewer than the maximum first bit number corresponding to a first transmission format with which a first bit number of the codeword is maximum among the predetermined transmission formats, and the second condition indicating that the specified size is fewer than the maximum second bit number corresponding to a second transmission format with which a second bit number of each of the quantization values is maximum among the predetermined transmission formats.

Abstract: A signal processing device including: a first memory, and a processing circuit coupled to the first memory and configured to perform decoding of a first received signal based on first likelihood data of the first received signal, transfer the first likelihood data to a second memory that is external to the signal processing device, only when the decoding is unsuccessful, and combine the first likelihood data loaded from the second memory with second likelihood data of a second received signal that corresponds to retransmitted signal of the first received signal.

Abstract: In a wireless communication method, a first wireless communication apparatus transmits through a first wireless resource to a second wireless communication apparatus a first signal generated from a second signal for use in processing performed by the second wireless communication apparatus and a third signal for use in error checking of the second signal. The second wireless communication apparatus detects a second wireless resource to be used in the processing on the basis of the first signal, and performs the processing by using the second signal and the detected second wireless resource. For the detection, a section of the first signal corresponding to the second wireless resource is scrambled, or the first signal is scrambled with a scrambling sequence corresponding to the second wireless resource, or the bit order in at least part of the first signal is changed in a manner corresponding to the second wireless resource.

Abstract: A wireless communications system including a mobile station MS and base stations BS1 and BS2, wherein one or both of the mobile station MS and the base stations BS1 and BS2 is provided with a unit for notifying information of a frame position with the possibility of transmission of packets based on detection of deterioration of a reception quality and wherein the mobile station MS is provided with a unit for determining a frame position without the possibility of transmission of packets and shifting to a peripheral cell detection mode at this frame position based on information of a frame position with the possibility of transmission of packets, whereby it is possible to shift to a peripheral cell detection mode without lowering the transmission efficiency and without complicating the processing.