Abstract: A standard cell library is used in design of a semiconductor integrated circuit. A driving force sequence of cells for a single function is in the form of geometric progression with a geometric ratio of the “pth root of 2,” where p is a natural number of 2 or more. A transistor in an output signal driving section of each of the cell is laid out using only layout devices which are limited to p types of sizes. Even if p is small, the driving force sequence can be formed in geometric progression with an extremely low increasing rate. At the same time, sizes of layout devices are discrete and limited, thereby easily securing accuracy of a performance model of a cell. As a result, the standard cell library allows a high-performance circuit to be designed in a highly reliable model.

Abstract: A standard cell library is used in design of a semiconductor integrated circuit. A driving force sequence of cells for a single function is in the form of geometric progression with a geometric ratio of the “pth root of 2,” where p is a natural number of 2 or more. A transistor in an output signal driving section of each of the cell is laid out using only layout devices which are limited to p types of sizes. Even if p is small, the driving force sequence can be formed in geometric progression with an extremely low increasing rate. At the same time, sizes of layout devices are discrete and limited, thereby easily securing accuracy of a performance model of a cell. As a result, the standard cell library allows a high-performance circuit to be designed in a highly reliable model.

Abstract: A method for optimizing element placement in which a processing time by the SA method is shortened and optimality of a solution is improved by generating a thermal equilibrium condition with high efficiency and high precision. The thermal equilibrium condition is generated by performing a Monte-Carlo simulation in which a placement Sj′ is accepted as the (j+1)th placement at a probability of w expressed by a relationship: w=1/(exp(&Dgr;E/(k×T))+1), wherein a cost function value for the jth placement Sj generated at one virtual temperature T is calculated as Ej, and a cost function value calculated for a placement Sj′ obtained by locally changing the placement Sj is varied by only &Dgr;E into Ej+&Dgr;E, and k denotes a normalization constant at a virtual temperature T.

Abstract: A method for optimizing element placement in which a processing time by the SA method is shortened and optimality of a solution is improved by generating a thermal equilibrium condition with high efficiency and high precision. The thermal equilibrium condition is generated by performing a Monte-Carlo simulation in which a placement Sj′ is accepted as the (j+1)th placement at a probability of w expressed by the following relationship: w=1/(exp(&Dgr;E/(k×T))+1), wherein a cost function value for the jth placement Sj generated at one virtual temperature T is calculated as Ej, and a cost function value calculated for a placement Sj′ obtained by locally changing the placement Sj is varied by only &Dgr;E into Ej+&Dgr;E, and k denotes a normalization constant at a virtual temperature T.

Abstract: As a method for determining transistor palcement of a cell by using a computer, a degree of integratin of the cell equivalent to manual layout design can be realized and a processing can be performed within a practical time. At a one-dimensional placement step, transistors of the cell are placed in a string with vertical placement state in each channel region. At a two-dimensional placement step, conditions of the one-dimensional placement step are excluded, and the transistors can be placed in a plurality of strings with horizontal placement state in each channel region to strings with horizontal placement state in each channel region to change the transistor placement. Consequently, a result of the transistor placement obtained at the one-dimensional placement step can be improved and the cell can be made more compact. At the one-dimensional placement step, global optimization is performed. At the two-dimensional step, only local improvement of the placement is performed.