Patents by Inventor Shunjiro Miwa

Shunjiro Miwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor integrated circuit and control, method of the same
    Publication number: 20100250967
    Abstract: There is provided a semiconductor integrated circuit including a scan path circuit, which includes an encryption data storage unit that stores a secret key B created by encrypting a chip ID with use of a secret key A, and an encryption circuit that encrypts output data of the scan path circuit based on the secret key B and outputs the encrypted output data. This circuit configuration enables an increase in confidentiality in encryption of a scan test result.
    Type: Application
    Filed: March 8, 2010
    Publication date: September 30, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Shunjiro Miwa
  • Scan flip-flop circuit and semiconductor integrated circuit device
    Patent number: 7590906
    Abstract: Disclosed is a scan flip-flop that includes a latch section, a hold section, a first output node and a second output node. The latch section holds data. The hold section captures an inner state, responsive to a control signal, to hold an output state. The first output node outputs a first output signal based on the output state. The second output node outputs a second output signal based on the inner state.
    Type: Grant
    Filed: January 8, 2007
    Date of Patent: September 15, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Shunjiro Miwa
  • Scan flip-flop circuit and semiconductor integrated circuit device
    Publication number: 20070162802
    Abstract: Disclosed is a scan flip-flop that includes a latch section, a hold section, a first output node and a second output node. The latch section holds data. The hold section captures an inner state, responsive to a control signal, to hold an output state. The first output node outputs a first output signal based on the output state. The second output node outputs a second output signal based on the inner state.
    Type: Application
    Filed: January 8, 2007
    Publication date: July 12, 2007
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Shunjiro Miwa