Patents by Inventor Shunko Magoshi

Shunko Magoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105420
    Abstract: A data generation apparatus of one embodiment includes a processing unit, an evaluation unit, and a conversion unit. The processing unit designs, through optical proximity correction based on a target pattern formed on a substrate using the photomask, a mask pattern corresponding to the target pattern and including a plurality of rectangular regions. The evaluation unit evaluates the mask pattern using a cost function having, as a parameter, a jog length indicating a length of each of the rectangular regions included in the mask pattern in a first direction. The conversion unit converts mask pattern data indicating the mask pattern with an evaluation that meets a predetermined condition to drawing data corresponding to a variable shaped beam drawing process.
    Type: Application
    Filed: June 9, 2023
    Publication date: March 28, 2024
    Applicant: Kioxia Corporation
    Inventors: Katsuyoshi KODERA, Shoji MIMOTOGI, Shunko MAGOSHI, Ryuji OGAWA, Taiki KIMURA
  • Patent number: 11742179
    Abstract: According to one embodiment, a proximity effect correcting method includes acquiring drawing information for drawing a pattern on a substrate with irradiation of an electron beam. The method further includes acquiring surface profile information related to a surface profile of the substrate. The method further includes calculating an energy distribution of a backscattered beam to be produced by backscattering of the electron beam in the substrate on a basis of the acquired drawing information and surface profile information. The method further includes calculating a required energy amount of the electron beam on a basis of the calculated energy distribution.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: August 29, 2023
    Assignee: Kioxia Corporation
    Inventors: Yoshinori Kagawa, Shunko Magoshi
  • Publication number: 20220238303
    Abstract: According to one embodiment, a proximity effect correcting method includes acquiring drawing information for drawing a pattern on a substrate with irradiation of an electron beam. The method further includes acquiring surface profile information related to a surface profile of the substrate. The method further includes calculating an energy distribution of a backscattered beam to be produced by backscattering of the electron beam in the substrate on a basis of the acquired drawing information and surface profile information. The method further includes calculating a required energy amount of the electron beam on a basis of the calculated energy distribution.
    Type: Application
    Filed: September 14, 2021
    Publication date: July 28, 2022
    Applicant: Kioxia Corporation
    Inventors: Yoshinori KAGAWA, Shunko MAGOSHI
  • Patent number: 8282868
    Abstract: According to the present invention, there is provided a semiconductor device fabrication method comprising, bringing a mold having a predetermined pattern into contact with at least a portion of an imprinting material formed on a substrate to be processed, and forming the pattern on the substrate to be processed by sequentially transferring the pattern for each shot, wherein one of a dicing region and a monitor pattern formation region of the substrate to be processed is coated with the imprinting material.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: October 9, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ikuo Yoneda, Shunko Magoshi
  • Patent number: 8206895
    Abstract: According to an aspect of the present invention, there is provided a method for forming a pattern including: applying a photosensitive resin onto a film on a wafer substrate; partly exposing the photosensitive resin to light and developing the photosensitive resin to form a first pattern having an opening portion; applying a photo-curable material onto the film exposed by the opening portion of the first pattern; bringing one face of an optically-transmissive template having a second pattern formed on the one face into contact with the photo-curable material, the second pattern including projections and reentrants; irradiating the photo-curable material with light; and separating the template from the photo-curable material.
    Type: Grant
    Filed: July 24, 2008
    Date of Patent: June 26, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ikuo Yoneda, Shunko Magoshi
  • Patent number: 7985958
    Abstract: According to an aspect of the invention, there is provided an electron beam drawing apparatus comprising at least one stage of a deflection amplifier and a deflection unit, a first storage section which stores shot information at a drawing time, a second storage section which stores a correction table indicating a relation between the shot information and an output voltage of the deflection amplifier, and an adjusting section which adjusts an output of the deflection amplifier based on the correction table stored in the second storage section and the shot information stored in the first storage section.
    Type: Grant
    Filed: November 8, 2005
    Date of Patent: July 26, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuro Nakasugi, Kazuo Tawarayama, Hiroyuki Mizuno, Takumi Ota, Noriaki Sasaki, Tatsuhiko Higashiki, Takeshi Koshiba, Shunko Magoshi
  • Publication number: 20110065254
    Abstract: According to the present invention, there is provided a semiconductor device fabrication method comprising, bringing a mold having a predetermined pattern into contact with at least a portion of an imprinting material formed on a substrate to be processed, and forming the pattern on the substrate to be processed by sequentially transferring the pattern for each shot, wherein one of a dicing region and a monitor pattern formation region of the substrate to be processed is coated with the imprinting material.
    Type: Application
    Filed: November 12, 2010
    Publication date: March 17, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Ikuo Yoneda, Shunko Magoshi
  • Patent number: 7854604
    Abstract: According to the present invention, there is provided a semiconductor device fabrication method comprising, bringing a mold having a predetermined pattern into contact with at least a portion of an imprinting material formed on a substrate to be processed, and forming the pattern on the substrate to be processed by sequentially transferring the pattern for each shot, wherein one of a dicing region and a monitor pattern formation region of the substrate to be processed is coated with the imprinting material.
    Type: Grant
    Filed: January 23, 2008
    Date of Patent: December 21, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ikuo Yoneda, Shunko Magoshi
  • Publication number: 20100021848
    Abstract: According to an aspect of the present invention, there is provided a method for forming a pattern including: applying a photosensitive resin onto a film on a wafer substrate; partly exposing the photosensitive resin to light and developing the photosensitive resin to form a first pattern having an opening portion; applying a photo-curable material onto the film exposed by the opening portion of the first pattern; bringing one face of an optically-transmissive template having a second pattern formed on the one face into contact with the photo-curable material, the second pattern including projections and reentrants; irradiating the photo-curable material with light; and separating the template from the photo-curable material.
    Type: Application
    Filed: July 24, 2008
    Publication date: January 28, 2010
    Inventors: Ikuo Yoneda, Shunko Magoshi
  • Publication number: 20080293169
    Abstract: A lithography evaluating method comprises preparing a substrate, the substrate including a semiconductor substrate and a wiring structure including at least one wiring layer formed on the semiconductor substrate, partitioning the substrate into a plurality of regions to be evaluated, and obtaining a value of property relating to the wiring structure previously, and evaluating proximity effect on each of the plurality of regions to be evaluated based on the value of the property relating to the wiring structure.
    Type: Application
    Filed: July 3, 2008
    Publication date: November 27, 2008
    Inventors: Kazuo TAWARAYAMA, Shunko Magoshi
  • Publication number: 20080214010
    Abstract: According to the present invention, there is provided a semiconductor device fabrication method comprising, bringing a mold having a predetermined pattern into contact with at least a portion of an imprinting material formed on a substrate to be processed, and forming the pattern on the substrate to be processed by sequentially transferring the pattern for each shot, wherein one of a dicing region and a monitor pattern formation region of the substrate to be processed is coated with the imprinting material.
    Type: Application
    Filed: January 23, 2008
    Publication date: September 4, 2008
    Inventors: Ikuo YONEDA, Shunko MAGOSHI
  • Patent number: 7368736
    Abstract: A exposure apparatus includes a charged beam radiating unit configured to radiate a charged beam, a shaping unit including an opening for shaping the beam, a storage unit to store a history of data concerning a beam area of the beam on the shaping unit, a predicting unit to predict change amount of dimensions of the beam passing through the opening to design dimensions of the opening, the predicting the change amount being carried out based on a relation between the beam area previously prepared and change amount of the dimensions of the beam passing through the opening to the design dimensions of the opening, and a correcting unit to correct dimension of a pattern which corresponds to the beam and is to be formed on the sample based on the change amount predicted by the predicting unit.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: May 6, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shunko Magoshi
  • Publication number: 20060214116
    Abstract: A exposure apparatus includes a charged beam radiating unit configured to radiate a charged beam, a shaping unit including an opening for shaping the beam, a storage unit to store a history of data concerning a beam area of the beam on the shaping unit, a predicting unit to predict change amount of dimensions of the beam passing through the opening to design dimensions of the opening, the predicting the change amount being carried out based on a relation between the beam area previously prepared and change amount of the dimensions of the beam passing through the opening to the design dimensions of the opening, and a correcting unit to correct dimension of a pattern which corresponds to the beam and is to be formed on the sample based on the change amount predicted by the predicting unit.
    Type: Application
    Filed: March 20, 2006
    Publication date: September 28, 2006
    Inventor: Shunko Magoshi
  • Patent number: 7102147
    Abstract: Provided is a charged particle beam exposure method placing an mask having openings in an exposure apparatus that including a deflector which deflects a charged particle beam on the mask, applying a first voltage to the deflector, the first voltage deflects the beam at an first opening, sequentially exposing all the character patterns which can be exposed by the beam shaped by the first opening after a stabilization time set as a function of a voltage has elapsed after applying the first voltage, applying a second voltage to the deflector after all the character patterns have been exposed by the beam shaped by the first opening, the second voltage deflects the beam at a next opening, and exposing all the character patterns which can be exposed by the beam shaped by the next opening after the stabilization time has elapsed after applying the second voltage.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: September 5, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryoichi Inanami, Shunko Magoshi, Atsushi Ando
  • Patent number: 7079994
    Abstract: A user is requested to input specifications of a semiconductor device. Based on the specifications, a plurality of circuit patterns are generated by a CP method, and a design parameter is calculated for each of the circuit patterns. The user is provided with information of the plurality of circuit patterns together with the design parameters. The user selects a desired circuit pattern, whereas the server calculates manufacturing costs of the device and presents them to the user. The user checks the costs and then places an order.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: July 18, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryoichi Inanami, Shunko Magoshi, Katsuya Okumura
  • Publication number: 20060151721
    Abstract: According to an aspect of the invention, there is provided an electron beam drawing apparatus comprising at least one stage of a deflection amplifier and a deflection unit, a first storage section which stores shot information at a drawing time, a second storage section which stores a correction table indicating a relation between the shot information and an output voltage of the deflection amplifier, and an adjusting section which adjusts an output of the deflection amplifier based on the correction table stored in the second storage section and the shot information stored in the first storage section.
    Type: Application
    Filed: November 8, 2005
    Publication date: July 13, 2006
    Inventors: Tetsuro Nakasugi, Kazuo Tawarayama, Hiroyuki Mizuno, Takumi Ota, Noriaki Sasaki, Tatsuhiko Higashiki, Takeshi Koshiba, Shunko Magoshi
  • Publication number: 20050167661
    Abstract: A lithography evaluating method comprises preparing a substrate, the substrate including a semiconductor substrate and a wiring structure including at least one wiring layer formed on the semiconductor substrate, partitioning the substrate into a plurality of regions to be evaluated, and obtaining a value of property relating to the wiring structure previously, and evaluating proximity effect on each of the plurality of regions to be evaluated based on the value of the property relating to the wiring structure.
    Type: Application
    Filed: November 23, 2004
    Publication date: August 4, 2005
    Inventors: Kazuo Tawarayama, Shunko Magoshi
  • Patent number: 6835942
    Abstract: A method for correcting a proximity effect applied to a dose of an electron beam exposure, includes classifying an underlying pattern of a level underlying a thin film layer; dividing a processing pattern to be transferred on the thin film layer into a first pattern overlapping with the underlying pattern and a second pattern which does not overlap with the underlying pattern according to the classified underlying pattern; calculating a pattern area density for the first and second patterns in a unit region; and calculating a corrected dose for the processing pattern according to the pattern area density.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: December 28, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shunko Magoshi, Shinji Sato
  • Publication number: 20040075064
    Abstract: A method for correcting a proximity effect applied to a dose of an electron beam exposure, includes classifying an underlying pattern of a level underlying a thin film layer; dividing a processing pattern to be transferred on the thin film layer into a first pattern overlapping with the underlying pattern and a second pattern which does not overlap with the underlying pattern according to the classified underlying pattern; calculating a pattern area density for the first and second patterns in a unit region; and calculating a corrected dose for the processing pattern according to the pattern area density.
    Type: Application
    Filed: June 25, 2003
    Publication date: April 22, 2004
    Inventors: Shunko Magoshi, Shinji Sato
  • Patent number: 6718532
    Abstract: A charged particle beam exposure method for shaping a charged particle beam by using an aperture mask having character apertures corresponding to the character shapes extracted from a semiconductor device pattern, the method comprises arranging the character apertures in the aperture mask, each of the character apertures having a shape corresponding to character shapes extracted from a standard cell pattern used for designing a semiconductor device, and varying the shape of the charged particle beam according to the outer shape of each of the character apertures, thereby applying the shaped charged particle beam to the character apertures.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: April 6, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryoichi Inanami, Shunko Magoshi, Atsushi Ando