Abstract: A manufacturing method of a semiconductor memory device in an embodiment, includes: forming a first mask pattern having a first opening and a plurality of second openings above a stacked body; forming a second mask pattern covering some of the plurality of second openings; and etching the stacked body with the first mask pattern as a mask while sequentially exposing the plurality of second openings by causing an end of the second mask pattern to retreat to form a first hole extending in the stacked body in a stacking direction of the stacked body at a position of the first opening and form a plurality of second holes extending in the stacked body to different depths in the stacking direction at positions of the plurality of second openings, and reaching first layers of a plurality of first layers at different levels.

Abstract: According to one embodiment, a semiconductor storage device includes a stacked section in which a plurality of conductor layers are stacked along a first direction and a stepped section in which the plurality of conductor layers are in a stepped shape. The stepped section includes a lower stepped section and an upper stepped section. In the upper stepped section, the conductor layers closer to the lower stepped section side along the first direction extend longer toward one side along a second direction orthogonal to the first direction. The lower stepped section is located at a position toward an opposite side to the one side along the second direction with respect to the upper stepped section.

Abstract: A manufacturing method of a semiconductor memory device in an embodiment, includes: forming a first mask pattern having a first opening and a plurality of second openings above a stacked body; forming a second mask pattern covering some of the plurality of second openings; and etching the stacked body with the first mask pattern as a mask while sequentially exposing the plurality of second openings by causing an end of the second mask pattern to retreat to form a first hole extending in the stacked body in a stacking direction of the stacked body at a position of the first opening and form a plurality of second holes extending in the stacked body to different depths in the stacking direction at positions of the plurality of second openings, and reaching first layers of a plurality of first layers at different levels.

Abstract: According to one embodiment, the first electrode layer includes a first portion and a second portion thicker than the first portion. The second electrode layer includes a third portion and a fourth portion thicker than the third portion. The fourth portion is provided on a lower level side of the second portion. The fourth portion has a level difference in a staircase configuration between the fourth portion and the second portion. The fourth portion protrudes along a first direction further than an edge of the second portion. The third electrode layer is provided between the first electrode layer and the third portion. The third electrode layer has an edge receding further than the edge of the second portion of the first electrode layer. The receding is in a reverse direction of a protruding direction of the fourth portion of the second electrode layer.

Abstract: According to one embodiment, the first electrode layer includes a first portion and a second portion thicker than the first portion. The second electrode layer includes a third portion and a fourth portion thicker than the third portion. The fourth portion is provided on a lower level side of the second portion. The fourth portion has a level difference in a staircase configuration between the fourth portion and the second portion. The fourth portion protrudes along a first direction further than an edge of the second portion. The third electrode layer is provided between the first electrode layer and the third portion. The third electrode layer has an edge receding further than the edge of the second portion of the first electrode layer. The receding is in a reverse direction of a protruding direction of the fourth portion of the second electrode layer.