Patents by Inventor Shunsuke Akimoto

Shunsuke Akimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160336335
    Abstract: An initial etch forms a trench over first contact areas of a plurality of NAND strings, the initial etch also forming individual openings over second contact areas of the plurality of NAND strings. Material is added in the trench to reduce an area of exposed bottom surface of the trench while maintaining the individual openings without substantial reduction of bottom surface area. Subsequent further etching extends the trench and the plurality of individual openings.
    Type: Application
    Filed: May 15, 2015
    Publication date: November 17, 2016
    Inventors: Shunsuke Akimoto, Hidetoshi Nakamoto, Keita Kumamoto, Hidehito Koseki, Yuji Takahashi, Noritaka Fukuo, Tomoyasu Kakegawa, Takuya Futase
  • Publication number: 20160291676
    Abstract: An information processing device has: a plurality of components supplied with power and performing given operations; a power allocation control part controlling the ratio of power allocated to the plurality of components; and an operation status acquisition part acquiring the operation status of at least one of the plurality of components. The power allocation control part controls the ratio of power allocated to the plurality of components so that a preset condition is satisfied on the basis of the operation status of at least one of the plurality of components.
    Type: Application
    Filed: March 24, 2016
    Publication date: October 6, 2016
    Inventor: SHUNSUKE AKIMOTO
  • Patent number: 9244740
    Abstract: An information processing device includes: a measurement unit 10 for measuring respective use rates of a plurality of coprocessors each for executing a job, respective use rates of a plurality of interface cards each for passing data input or output by each of the plurality of coprocessors, and respective latencies and respective throughputs in communication between the plurality of coprocessors and the plurality of interface cards; and a determination unit 20 for determining a coprocessor that is to execute the job from among the plurality of coprocessors, based on a result of the measurement by the measurement unit 10.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: January 26, 2016
    Assignee: NEC CORPORATION
    Inventor: Shunsuke Akimoto
  • Publication number: 20140250287
    Abstract: An information processing device includes: a measurement unit 10 for measuring respective use rates of a plurality of coprocessors each for executing a job, respective use rates of a plurality of interface cards each for passing data input or output by each of the plurality of coprocessors, and respective latencies and respective throughputs in communication between the plurality of coprocessors and the plurality of interface cards; and a determination unit 20 for determining a coprocessor that is to execute the job from among the plurality of coprocessors, based on a result of the measurement by the measurement unit 10.
    Type: Application
    Filed: March 4, 2014
    Publication date: September 4, 2014
    Applicant: NEC CORPORATION
    Inventor: SHUNSUKE AKIMOTO
  • Publication number: 20120246402
    Abstract: A communication device reducing the processing time to install data on a disc storage medium onto multiple servers is provided. A protocol serializer 10 of a communication device 5 serializes read requests received from servers A1 to A2 for target data stored on a disc storage medium K in a processing order. A cache controller 11 determines whether the target data corresponding to the read requests are present in a cache memory 4 in the order of serialized read requests and, if present, receives the target data from the cache memory 4 via a memory controller 12. If not present, the cache controller 11 acquires the target data from the disc storage medium K via a DVD/CD controller 13. Then, the protocol serializer 10 sends the target data acquired by the cache controller 11 to the server of the transmission source of the read request corresponding to the target data.
    Type: Application
    Filed: March 23, 2012
    Publication date: September 27, 2012
    Applicant: NEC Corporation
    Inventor: Shunsuke AKIMOTO
  • Patent number: 8219839
    Abstract: A power distribution system is adapted to a management module connected to a plurality of servers, each of which is varied in power consumption in response to a power mode and performance thereof, via a power allocation request line and a power allocation response line. The management module records the upper-limit power setting, the power allocations, and the power pool with regard to the servers. The server records the power mode, the power allocation, the upper mode request threshold, and the redundant power which is calculated based on the difference between the power allocation and the actual power consumption. The management module recovers the redundant power from the server so as to update the power pool. Upon receiving a power allocation request, the management module distributes at least a part of the power pool to the server, thus allowing the server to shift the power mode to the upper mode.
    Type: Grant
    Filed: February 16, 2010
    Date of Patent: July 10, 2012
    Assignee: NEC Corporation
    Inventor: Shunsuke Akimoto
  • Patent number: 8086887
    Abstract: An apparatus which communicates with another apparatus includes a control unit which monitors a power consumption of the apparatus, supplies a power to the another apparatus when the power consumption includes a surplus, and requests the another apparatus to supply the power when the power consumption includes a shortage, and an adjusting unit which adjusts the power consumption of the apparatus according to an operation of the control unit.
    Type: Grant
    Filed: September 9, 2008
    Date of Patent: December 27, 2011
    Assignee: NEC Corporation
    Inventor: Shunsuke Akimoto
  • Publication number: 20110243332
    Abstract: A data processing system comprises a plurality of key production modules each of which stores keys required to encrypt data and decrypt the encrypted data, produces a new key, encrypts the newly produced key by using one of the keys stored therein as a master key, and stores the encrypted key therein. The data processing system comprises a key replication unit that, upon producing a new key in one of the key production modules serving as a source key production module, urges the source key production module to encrypt the newly produced key by using one of the keys stored in another of the remaining key production modules serving as a destination key production module, and then stores the encrypted key in the destination key production module, thereby executing a key replication process.
    Type: Application
    Filed: February 8, 2011
    Publication date: October 6, 2011
    Inventor: SHUNSUKE AKIMOTO
  • Patent number: 7865686
    Abstract: Provided is a virtual computer system capable of finding a configuration whose total sum of memory access delays is smaller than that of a current configuration. In a virtual computer system in which with memory access times within a node and between nodes differing from each other, a hypervisor controls a plurality of virtual processors which execute a process on a plurality of nodes, the hypervisor includes a unit which obtains a total sum of memory access delay time on the virtual machine based on affinity information indicative of a latency or a band of communication between the virtual processors and traffic between the virtual processors, and a unit which reconfigures physical resources based on the total sum of delay time.
    Type: Grant
    Filed: March 21, 2007
    Date of Patent: January 4, 2011
    Assignee: NEC Corporation
    Inventor: Shunsuke Akimoto
  • Publication number: 20100211807
    Abstract: A power distribution system is adapted to a management module connected to a plurality of servers, each of which is varied in power consumption in response to a power mode and performance thereof, via a power allocation request line and a power allocation response line. The management module records the upper-limit power setting, the power allocations, and the power pool with regard to the servers. The server records the power mode, the power allocation, the upper mode request threshold, and the redundant power which is calculated based on the difference between the power allocation and the actual power consumption. The management module recovers the redundant power from the server so as to update the power pool. Upon receiving a power allocation request, the management module distributes at least a part of the power pool to the server, thus allowing the server to shift the power mode to the upper mode.
    Type: Application
    Filed: February 16, 2010
    Publication date: August 19, 2010
    Inventor: SHUNSUKE AKIMOTO
  • Publication number: 20090077407
    Abstract: An apparatus which communicates with another apparatus includes a control unit which monitors a power consumption of the apparatus, supplies a power to the another apparatus when the power consumption includes a surplus, and requests the another apparatus to supply the power when the power consumption includes a shortage, and an adjusting unit which adjusts the power consumption of the apparatus according to an operation of the control unit.
    Type: Application
    Filed: September 9, 2008
    Publication date: March 19, 2009
    Applicant: NEC Corporation
    Inventor: Shunsuke Akimoto
  • Publication number: 20070226449
    Abstract: Provided is a virtual computer system capable of finding a configuration whose total sum of memory access delays is smaller than that of a current configuration. In a virtual computer system in which with memory access times within a node and between nodes differing from each other, a hypervisor controls a plurality of virtual processors which execute a process on a plurality of nodes, the hypervisor includes a unit which obtains a total sum of memory access delay time on the virtual machine based on affinity information indicative of a latency or a band of communication between the virtual processors and traffic between the virtual processors, and a unit which reconfigures physical resources based on the total sum of delay time.
    Type: Application
    Filed: March 21, 2007
    Publication date: September 27, 2007
    Applicant: NEC CORPORATION
    Inventor: Shunsuke Akimoto