Abstract: A communication control device includes a communication unit, an acquiring unit, and an adjusting unit. The communication unit transfers first image data acquired from a first processing unit to an external controller of a system, receives second image data transferred from the external controller during an interval between pieces of the first image data transferred in predetermined units, and transfers the received second image data to a second processing unit. The system includes the communication control device and the external controller connected to the communication control device by a half-duplex communication line. The acquiring unit acquires a length of a transfer period for transferring the second image data. The adjusting unit adjusts timing of acquiring the first image data in accordance with the length of the transfer period acquired by the acquiring unit.

Abstract: A communication control device includes a communication unit, a reception unit, and a controller. The communication unit transfers first image data obtained from a first processing device to an external control device for each portion among portions that are predetermined transfer units, and transfers second image data transferred from the external control device to a second processing device, the communication control device and the external control device being included in a system and being connected to each other via a communication line for half-duplex communication. The reception unit receives a signal that is transmitted during an interval between the portions of the first image data. The controller performs control so as to start obtaining the second image data transferred from the external control device in a case where the signal is received by the reception unit.

Abstract: An information processing apparatus includes a switching unit and a controller. The information processing apparatus performs a data sending and receiving operation with an external apparatus via a data line which is compliant with a predetermined standard. The switching unit switches the information processing apparatus to a host device or a non-host device in accordance with a state of the information processing apparatus. The controller controls a data sending and receiving operation performed with the external apparatus. The controller controls a data sending and receiving operation for a host device when the information processing apparatus is switched to the host device. The controller controls a data sending and receiving operation for a non-host device when the information processing apparatus is switched to the non-host device.

Abstract: A power control device includes non-volatile memory, a controller, and a logic circuit. The non-volatile memory includes a function of externally outputting a logical state of a bit stored in a specific area as a state hold signal that indicates an ON/OFF state of a device function unit before a power cutoff. The controller controls the ON/OFF state of the device function unit and also writes the ON/OFF state of the device function unit to the specific area of the non-volatile memory. The logic circuit controls power supply to the controller on the basis of a logic level of the state hold signal from the non-volatile memory.

Abstract: A processing apparatus includes following components. Processing units each operate when being supplied with power. A first detector detects an object entering a first detection area. A second detector detects an object entering a second detection area. A first controller controls power supply to the processing units and the first and second detectors. At a start of a power-saving mode, the first controller stops supplying power to the second detector and at least one processing unit and supplies power to the first detector. After the start of the power-saving mode, the first controller restarts supplying power to the second detector when the first detector detects an object entering the first detection area. When the second detector detects an object entering the second detection area in the power-saving mode, the first controller restarts supplying power to the at least one processing unit so as to cancel the power-saving mode.

Abstract: A processing apparatus includes following components. Processing units each operate when being supplied with power. A first detector detects an object entering a first detection area. A second detector detects an object entering a second detection area. A first controller controls power supply to the processing units and the first and second detectors. At a start of a power-saving mode, the first controller stops supplying power to the second detector and at least one processing unit and supplies power to the first detector. After the start of the power-saving mode, the first controller restarts supplying power to the second detector when the first detector detects an object entering the first detection area. When the second detector detects an object entering the second detection area in the power-saving mode, the first controller restarts supplying power to the at least one processing unit so as to cancel the power-saving mode.

Abstract: A power control device includes non-volatile memory, a controller, and a logic circuit. The non-volatile memory includes a function of externally outputting a logical state of a bit stored in a specific area as a state hold signal that indicates an ON/OFF state of a device function unit before a power cutoff. The controller controls the ON/OFF state of the device function unit and also writes the ON/OFF state of the device function unit to the specific area of the non-volatile memory. The logic circuit controls power supply to the controller on the basis of a logic level of the state hold signal from the non-volatile memory.

Abstract: An image forming apparatus having an operation mode, an energy saving mode, and a stop mode includes an image forming unit that forms an image on a recording member, and a control unit that controls the image forming unit, wherein the control unit includes an arithmetic unit that performs a logical operation or a numerical operation, a storage unit that stores a register value used by the arithmetic unit in a non-volatile register which is readable and writable, and retains stored information even when no power is supplied, and a change unit that changes the register value stored in the non-volatile register so as to correspond to a mode change between the operation mode and the energy saving mode or between the operation mode and the stop mode.

Abstract: A program executing apparatus, includes: a nonvolatile memory that stores a program for activating an equipment and a variable used in the program and sustains the stored program and the variable even though power is not supplied, the program and the variable being able to be read out and written into the nonvolatile memory; and an executing unit that transmits the program and the variable to the nonvolatile memory when the activation of the equipment is instructed at an initial status where the program and the variable are not stored in the nonvolatile memory, and successively executes the program using the variable stored in the nonvolatile memory, and, when the activation of the equipment is re-instructed, executes the program using the variable stored in the nonvolatile memory.

Abstract: An image forming apparatus having an operation mode, an energy saving mode, and a stop mode includes an image forming unit that forms an image on a recording member, and a control unit that controls the image forming unit, wherein the control unit includes an arithmetic unit that performs a logical operation or a numerical operation, a storage unit that stores a register value used by the arithmetic unit in a non-volatile register which is readable and writable, and retains stored information even when no power is supplied, and a change unit that changes the register value stored in the non-volatile register so as to correspond to a mode change between the operation mode and the energy saving mode or between the operation mode and the stop mode.

Abstract: Provided is an information processor including: an operation unit performing logical operation or arithmetical operation; an execution unit executing predetermined functions based on the operation results; a clock signal generating unit generating a first clock signal to be a reference; a clock signal multiplying unit performing a multiplication operation on the first clock signal to generate a second clock signal; a clock signal selection unit selecting one of the first or second clock signals and supplies the selected signal to the execution unit; a memory storing data for setting the execution unit to be in an executable state in a readable and writable non-volatile memory; and a setting unit setting the execution unit to be in an executable state by causing the clock signal selection unit to select the first clock signal when reset is released and reading the data from the memory to start writing the data.

Abstract: A program executing apparatus, includes : a nonvolatile memory that stores a program for activating an equipment and a variable used in the program and sustains the stored program and the variable even though power is not supplied, the program and the variable being able to be read out and written into the nonvolatile memory; and an executing unit that transmits the program and the variable to the nonvolatile memory when the activation of the equipment is instructed at an initial status where the program and the variable are not stored in the nonvolatile memory, and successively executes the program using the variable stored in the nonvolatile memory, and, when the activation of the equipment is re-instructed, executes the program using the variable stored in the nonvolatile memory.

Abstract: A data processing apparatus includes an operation unit, a writable and readable volatile register, a writable and readable nonvolatile memory, first and second writing units and a write-back unit. The operation unit performs an arithmetic operation and a logical operation. The writable and readable volatile register stores data used in the operations performed by the operation unit. The writable and readable nonvolatile memory stores the data in parallel with the volatile register. The data stored in the nonvolatile memory is the data stored in the volatile register. The first writing unit writes the data in the volatile register. The second writing unit writes the data in the nonvolatile memory in parallel with the first writing unit every time the data is written in the volatile register. The write-back unit writes back the data stored in the nonvolatile memory to the volatile register when a power supply is turned on.