Patents by Inventor Shunsuke OCHIAI
Shunsuke OCHIAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11935750Abstract: A method for producing a semiconductor device includes forming, on a substrate, a film to be processed. The method further includes forming, on the film to be processed, a first film containing a metallic element and a second film containing at least one of carbon or boron. The method further includes forming an insulating film on the first and second films. The method further includes processing the film to be processed using the first film, the second film, and the insulating film, as a mask.Type: GrantFiled: February 25, 2021Date of Patent: March 19, 2024Assignee: KIOXIA CORPORATIONInventors: Kei Watanabe, Toshiyuki Sasaki, Soichi Yamazaki, Shunsuke Ochiai, Yuya Matsubara
-
Patent number: 11296109Abstract: A method of manufacturing a semiconductor device according to one embodiment includes forming a first film including a first metal above a processing target member. The method includes forming a second film including two or more types of element out of a second metal, carbon, and boron above the first film. The method includes forming a third film including the first metal above the second film. The method includes forming a mask film by providing an opening part to a stacked film including the first film, the second film and the third film. The method includes processing the processing target member by performing etching using the mask film as a mask.Type: GrantFiled: December 18, 2019Date of Patent: April 5, 2022Assignee: KIOXIA CORPORATIONInventors: Ryohei Kitao, Atsuko Sakata, Takeshi Ishizaki, Satoshi Wakatsuki, Shinichi Nakao, Shunsuke Ochiai, Kei Watanabe
-
Publication number: 20210335610Abstract: A method for producing a semiconductor device includes forming, on a substrate, a film to be processed. The method further includes forming, on the film to be processed, a first film containing a metallic element and a second film containing at least one of carbon or boron. The method further includes forming an insulating film on the first and second films. The method further includes processing the film to be processed using the first film, the second film, and the insulating film, as a mask.Type: ApplicationFiled: February 25, 2021Publication date: October 28, 2021Applicant: Kioxia CorporationInventors: Kei WATANABE, Toshiyuki SASAKI, Soichi YAMAZAKI, Shunsuke OCHIAI, Yuya MATSUBARA
-
Publication number: 20200127007Abstract: A method of manufacturing a semiconductor device according to one embodiment includes forming a first film including a first metal above a processing target member. The method includes forming a second film including two or more types of element out of a second metal, carbon, and boron above the first film. The method includes forming a third film including the first metal above the second film. The method includes forming a mask film by providing an opening part to a stacked film including the first film, the second film and the third film. The method includes processing the processing target member by performing etching using the mask film as a mask.Type: ApplicationFiled: December 18, 2019Publication date: April 23, 2020Applicant: TOSHIBA MEMORY CORPORATIONInventors: Ryohei KITAO, Atsuko SAKATA, Takeshi ISHIZAKI, Satoshi WAKATSUKI, Shinichi NAKAO, Shunsuke OCHIAI, Kei WATANABE
-
Patent number: 10541250Abstract: A method of manufacturing a semiconductor device according to one embodiment includes forming a first film including a first metal above a processing target member. The method includes forming a second film including two or more types of element out of a second metal, carbon, and boron above the first film. The method includes forming a third film including the first metal above the second film. The method includes forming a mask film by providing an opening part to a stacked film including the first film, the second film and the third film. The method includes processing the processing target member by performing etching using the mask film as a mask.Type: GrantFiled: June 28, 2016Date of Patent: January 21, 2020Assignee: Toshiba Memory CorporationInventors: Ryohei Kitao, Atsuko Sakata, Takeshi Ishizaki, Satoshi Wakatsuki, Shinichi Nakao, Shunsuke Ochiai, Kei Watanabe
-
Patent number: 10153164Abstract: A method for manufacturing a semiconductor device includes forming a mask layer including a) one metal from tungsten, tantalum, zirconium, hafnium, molybdenum, niobium, ruthenium, osmium, rhenium, and iridium, b) boron, and c) carbon on a layer to be etched. The mask layer is patterned. A hole or a groove is formed in the layer to be etched by performing dry etching on the layer to be etched using the patterned mask layer. The mask layer includes a first region and a second region. The first region includes boron and the second region includes boron such that a density of boron in the second region is different from a density of boron in the first region, or the first region includes carbon and the second region includes carbon such that a density of carbon in the second region is different from a density of carbon in the first region.Type: GrantFiled: July 27, 2017Date of Patent: December 11, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Shinichi Nakao, Shunsuke Ochiai, Yusuke Oshiki, Kei Watanabe, Mitsuhiro Omura
-
Publication number: 20180166276Abstract: A method for manufacturing a semiconductor device includes forming a mask layer including a) one metal from tungsten, tantalum, zirconium, hafnium, molybdenum, niobium, ruthenium, osmium, rhenium, and iridium, b) boron, and c) carbon on a layer to be etched. The mask layer is patterned. A hole or a groove is formed in the layer to be etched by performing dry etching on the layer to be etched using the patterned mask layer. The mask layer includes a first region and a second region. The first region includes boron and the second region includes boron such that a density of boron in the second region is different from a density of boron in the first region, or the first region includes carbon and the second region includes carbon such that a density of carbon in the second region is different from a density of carbon in the first region.Type: ApplicationFiled: July 27, 2017Publication date: June 14, 2018Applicant: TOSHIBA MEMORY CORPORATONInventors: Shinichi NAKAO, Shunsuke OCHIAI, Yusuke OSHIKI, Kei WATANABE, Mitsuhiro OMURA
-
Patent number: 9754793Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a mask layer on a layer to be etched, the mask layer containing tungsten and boron, a composition ratio of the tungsten being not less than 30%, patterning the mask layer, and performing a dry etching to the layer to be etched using the mask layer being patterned, and forming a hole or a slit in the layer to be etched.Type: GrantFiled: December 12, 2016Date of Patent: September 5, 2017Assignee: TOSHIBA MEMORY CORPORATIONInventors: Shinichi Nakao, Shunsuke Ochiai, Yusuke Oshiki, Kei Watanabe, Mitsuhiro Omura, Kosuke Horibe, Atsuko Sakata, Junichi Wada, Soichi Yamazaki, Masayuki Kitamura, Yuya Matsubara
-
Publication number: 20170186766Abstract: A method of manufacturing a semiconductor device according to one embodiment includes forming a first film including a first metal above a processing target member. The method includes forming a second film including two or more types of element out of a second metal, carbon, and boron above the first film. The method includes forming a third film including the first metal above the second film. The method includes forming a mask film by providing an opening part to a stacked film including the first film, the second film and the third film. The method includes processing the processing target member by performing etching using the mask film as a mask.Type: ApplicationFiled: June 28, 2016Publication date: June 29, 2017Inventors: Ryohei KITAO, Atsuko Sakata, Takeshi Ishizaki, Satoshi Wakatsuki, Shinichi Nakao, Shunsuke Ochiai, Kei Watanabe
-
Patent number: 9620366Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a mask layer on a layer to be etched. The mask layer contains at least one type of a metal, boron, and carbon. The metal is selected from a group including tungsten, tantalum, zirconium, hafnium, molybdenum, niobium, ruthenium, osmium, rhenium and iridium. A composition ratio of the metal is higher than a composition ratio of the boron and a composition ratio of the carbon. The method includes making a hole or a slit in the layer to be etched by performing a dry etching to the layer to be etched using the mask layer being patterned.Type: GrantFiled: June 10, 2016Date of Patent: April 11, 2017Assignee: Kabushiki Kaisha ToshibaInventors: Shinichi Nakao, Shunsuke Ochiai, Yusuke Oshiki, Kei Watanabe, Mitsuhiro Omura
-
Publication number: 20170092505Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a mask layer on a layer to be etched, the mask layer containing tungsten and boron, a composition ratio of the tungsten being not less than 30%, patterning the mask layer, and performing a dry etching to the layer to be etched using the mask layer being patterned, and forming a hole or a slit in the layer to be etched.Type: ApplicationFiled: December 12, 2016Publication date: March 30, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Shinichi NAKAO, Shunsuke OCHIAI, Yusuke OSHIKI, Kei WATANABE, Mitsuhiro OMURA, Kosuke HORIBE, Atsuko SAKATA, Junichi WADA, Soichi YAMAZAKI, Masayuki KITAMURA, Yuya MATSUBARA
-
Publication number: 20160365249Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a mask layer on a layer to be etched. The mask layer contains at least one type of a metal, boron, and carbon. The metal is selected from a group including tungsten, tantalum, zirconium, hafnium, molybdenum, niobium, ruthenium, osmium, rhenium and iridium. A composition ratio of the metal is higher than a composition ratio of the boron and a composition ratio of the carbon. The method includes making a hole or a slit in the layer to be etched by performing a dry etching to the layer to be etched using the mask layer being patterned.Type: ApplicationFiled: June 10, 2016Publication date: December 15, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Shinichi Nakao, Shunsuke Ochiai, Yusuke Oshiki, Kei Watanabe, Mitsuhiro Omura
-
Patent number: 9244343Abstract: According to one embodiment, a pattern forming method includes: forming a guide layer, including a base layer and a neutralization film with a plurality of parallel line sections, on a processing target film, forming a polymer material containing first polymer segments and second polymer segments, on the guide layer, forming a self-assembly pattern having a plurality of first polymer portions containing the first polymer segment and extending in a direction of the line sections, and a plurality of second polymer portions containing the second polymer segment alternating with the first polymer portions and extending along the direction of the line sections, and selectively removing the second polymer portions. The widths of line sections of both ends of the plurality of line sections of the neutralization film are about two times the width of each first polymer portion or each second polymer portion.Type: GrantFiled: February 26, 2014Date of Patent: January 26, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Ryoji Yoshikawa, Hideaki Sakurai, Shunsuke Ochiai
-
Publication number: 20150021295Abstract: According to one embodiment, a pattern forming method includes: forming a guide layer, including a base layer and a neutralization film with a plurality of parallel line sections, on a processing target film, forming a polymer material containing first polymer segments and second polymer segments, on the guide layer, forming a self-assembly pattern having a plurality of first polymer portions containing the first polymer segment and extending in a direction of the line sections, and a plurality of second polymer portions containing the second polymer segment alternating with the first polymer portions and extending along the direction of the line sections, and selectively removing the second polymer portions. The widths of line sections of both ends of the plurality of line sections of the neutralization film are about two times the width of each first polymer portion or each second polymer portion.Type: ApplicationFiled: February 26, 2014Publication date: January 22, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Ryoji YOSHIKAWA, Hideaki Sakurai, Shunsuke Ochiai
-
Publication number: 20130344698Abstract: According to one embodiment, a mask layer is formed on a film to be processed. A resist film containing a desired pattern is formed on the mask layer. Etching is performed on the above mentioned mask layer with an etching gas that does not contain fluorine. The method also includes removing the resist film. After the resist film is removed, using the mask layer as a mask, an etching is performed on the to be processed film using a fluorocarbon gas.Type: ApplicationFiled: March 4, 2013Publication date: December 26, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Shunsuke OCHIAI, Hisataka HAYASHI, Yusuke KASAHARA