Abstract: The present invention provides an ohmic heating-type exhaust gas purification catalyst system. The ohmic heating-type exhaust gas purification catalyst system is configured to perform, based on information of temperature of a catalyst bed input from a temperature detector of an ohmic heating-type exhaust gas purification device, electric current pass control including controls of (1) causing an electric current to pass through a pair of electrodes when the temperature of the catalyst bed is equal to or lower than a first threshold temperature T1 set in a range of 350±25° C., (2) not causing an electric current to pass through the pair of electrodes when the temperature of the catalyst bed exceeds the first threshold temperature T1 and is equal to or lower than a second threshold temperature T2 set in a range of 450±25° C.

Abstract: A semiconductor device according to an embodiment includes a semiconductor chip having a transistor region and a diode region, and a conductor. The semiconductor chip includes a first electrode, a second electrode, a silicon carbide layer between the first electrode and the second electrode, and a gate electrode. The first electrode includes a first region in the transistor region and a second region in the diode region. A first contact area between the conductor and the first region is larger than a second contact area between the conductor and the second region.

Abstract: A joined assembly includes: a first member; a second member which has a facing part facing the first member in a thickness direction thereof; and joints lying along the facing part to join the first member and the second member to each other. The joints include: a pair of end joints respectively located at the opposite end portions of the facing part; and an intermediate joint located between the end joints and having a lower joining strength than the end joints. The end joint includes a fastening member mechanically joining the first member and the second member. The intermediate joint includes a friction-stirred part joining the first member and the second member by friction stir.

Abstract: A semiconductor device according to an embodiment includes a semiconductor chip having a transistor region and a diode region, a first conductor, and a second conductor. The semiconductor chip includes a first electrode, a second electrode, a silicon carbide layer between the first electrode and the second electrode, and a gate electrode. The transistor region is provided with a third electrode spaced apart from the first electrode and close to the diode region. One end of the first conductor is in contact with the first electrode, and one end of the second conductor is in contact with the third electrode.

Abstract: A semiconductor device according to an embodiment includes a transistor region and a diode region. The transistor region includes n-type first SiC region having a first portion contacting a first plane, p-type second SiC region, n-type third SiC region, and a gate electrode. The diode region includes the first SiC region having a second portion contacting the first plane and p-type fourth SiC region. The semiconductor device includes a first electrode contacting the first portion and the second portion and a second electrode contacting a second plane. An occupied area per unit area of the fourth SiC region is larger than an occupied area per unit area of the second SiC region. In addition, a first diode region is provided between a first transistor region and a second transistor region. An inorganic insulating layer is provided between the first electrode and a gate wiring adjacent to the first electrode.

Abstract: A semiconductor device according to an embodiment includes a transistor region and a diode region. The transistor region includes a first silicon carbide region of n-type having a first portion in contact with a first plane, a second silicon carbide region of p-type, a third silicon carbide region of n-type, and a gate electrode. The diode region includes the first silicon carbide region of n-type having a second portion in contact with the first plane and a fourth silicon carbide region of p-type. The semiconductor device includes a gate wiring electrically connected to the gate electrode. A distance between a high-concentration portion included in the fourth silicon carbide region and the gate wiring is larger than a distance between a high-concentration portion included in the second silicon carbide region and the gate wiring.

Abstract: Provided herein is a hydrotreating catalyst for hydrocarbon oil having high desulfurization activity, and high abrasion strength and high compressive strength. A process for producing the hydrotreating catalyst is also provided. The hydrotreating catalyst uses an alumina-phosphorus support. The support contains 0.5 to 2.0 mass % of phosphorus in terms of an oxide. The support loads a metal in Group 6A of the periodic table, and a metal in Group 8 of the periodic table. The hydrotreating catalyst has a specific surface area of 150 m2/g or more. The hydrotreating catalyst has a total pore volume of 0.40 to 0.75 ml/g as measured by a mercury intrusion method. The hydrotreating catalyst has two maximal peaks in a pore diameter range of 6 nm to 13 nm in a log differential pore volume distribution measured by a mercury intrusion method. The hydrotreating catalyst has an abrasion strength of 0.5% or less. The hydrotreating catalyst has a compressive strength of 15 N/mm or more.

Abstract: Provided herein is a hydrotreating catalyst for hydrocarbon oil having high desulfurization activity, and high abrasion strength and high compressive strength. A process for producing the hydrotreating catalyst is also provided. The hydrotreating catalyst uses an alumina-phosphorus support. The support contains 0.5 to 2.0 mass % of phosphorus in terms of an oxide. The support loads a metal in Group 6A of the periodic table, and a metal in Group 8 of the periodic table. The hydrotreating catalyst has a specific surface area of 150 m2/g or more. The hydrotreating catalyst has a total pore volume of 0.40 to 0.75 ml/g as measured by a mercury intrusion method. The hydrotreating catalyst has two maximal peaks in a pore diameter range of 6 nm to 13 nm in a log differential pore volume distribution measured by a mercury intrusion method. The hydrotreating catalyst has an abrasion strength of 0.5% or less. The hydrotreating catalyst has a compressive strength of 15 N/mm or more.