Abstract: According to one embodiment, a semiconductor device has a stack of first films and first insulating films stacked in a first direction. The first films include an electrode layer and a second insulating film on an upper face, a lower face, and a side face of the electrode layer. A semiconductor layer extends in the first direction. A charge accumulating layer is between the semiconductor layer and the film stack in a second direction and has first portions between the first films and the semiconductor layer and second portions between the first insulating films and the semiconductor layer. The first portions each have a first thickness in the second direction, and the second portions each have a second thickness less than the first in the second direction. First portions have a first width, and first films have a second width that is less than the first width.

Abstract: A management device comprises an extracting means that extracts, from a database storing configuration information, the client terminals belonging to a specified group, network devices directly serving the client terminals, network devices between the serving network devices, and MEC devices to be treated as candidates for selection, and a selecting means that selects the MEC device to be accessed by the plurality of client terminals forming the group by using first and second amounts of latency, the first amount of latency being the amount of latency between each network device directly serving the client terminals belonging to the group and each MEC device, and the second amount of latency being the amount of latency between each network device directly serving the client terminals belonging to the group and each client terminal.

Abstract: An electrode structure includes: a plurality of pixel electrodes arranged separately from each other; and a plurality of dielectric layers laminated in a first direction with respect to the plurality of pixel electrodes, in which the plurality of dielectric layers includes: a first dielectric layer that spreads over the plurality of pixel electrodes in a direction intersecting with the first direction; and a second dielectric layer that includes dielectric material having a refractive index higher than that of the first dielectric layer, sandwiches the first dielectric layer together with the plurality of pixel electrodes, and has a slit at a position overlapping space between pixel electrodes adjacent when viewed from the first direction.

Abstract: A photo-alignment thermosetting liquid crystal composition including: a side-chain liquid crystal polymer which contains a liquid crystal constitutional unit containing a liquid crystal moiety in a side chain and a non-liquid crystal constitutional unit containing an alkylene group in a side chain, a copolymer which contains a photo-alignment constitutional unit containing a photo-alignment group in a side chain and a thermally crosslinkable constitutional unit containing a thermally crosslinkable group in a side chain, and in which the photo-alignment constitutional unit does not contain a linear alkylene group between the photo-alignment group and a monomer unit, and a thermal crosslinking agent for bonding to the thermally crosslinkable group of the thermally crosslinkable constitutional unit.

Abstract: A semiconductor storage device relating to one embodiment includes: a stacked body in which electrode films and insulating films are alternately stacked in a first direction; a first and a second charge storage films that are arranged away from each other in the first direction inside the stacked body and each face one of the electrode films; and a tunnel insulating film that extends in the first direction inside the stacked body and is in contact with the first and the second charge storage films. The first and the second charge storage films each include a first film that is in contact with the electrode film and contains a High-k material, and a second film that is provided between the first film and the tunnel insulating film and contains silicon nitride.

Abstract: A semiconductor device manufacturing method includes forming a first film containing a first device on a first substrate, forming a second film containing a semiconductor layer on a second substrate, and changing the semiconductor layer into a porous layer. The method further includes forming a third film containing a second device on the second film, and bonding the first substrate and the second substrate to sandwich the first film, the third film, and the second film therebetween. The method further includes separating the first substrate and the second substrate from each other at a position of the second film.

Abstract: According to one embodiment, a semiconductor memory device comprises a substrate, a first conductive layer, and a second conductive layer arranged in this order in a first direction and separated from each other, a first semiconductor film extending in the first direction, intersecting the first conductive layer, and being in contact with the second conductive layer, and a first charge storage film arranged between the first semiconductor film and the first conductive layer, and being in contact with the second conductive layer, wherein the first semiconductor film includes a first portion formed of an n-type semiconductor at approximately a same height as the first conductive layer.

Abstract: A semiconductor storage device of an embodiment includes: a laminated body including electrode layers and insulating layers alternately stacked in a first direction; a semiconductor layer disposed in the laminated body; a first insulating film disposed between the laminated body and the semiconductor layer; a charge storage film disposed between the laminated body and the first insulating film, thicknesses of the charge storage film in a second direction crossing the first direction in the regions corresponding to the electrode layers being different from that in the regions corresponding to the insulating layers, the charge storage film comprising: a second insulating film disposed between the laminated body and the first insulating film, and a third insulating film disposed between the second insulating film and the regions corresponding to the electrode layers, the third insulating film having a density different from that of the second insulating film.

Abstract: Locking members disposed on a casing of an underfloor device for railway vehicles engage hanging tools disposed on the vehicle, whereby the underfloor device for railway vehicles is attached to the vehicle. The locking member is a hollow locking member that includes a locking part to contact and engage a vertically upper face of part of the hanging tool, a mount part attached to the casing, and a connection part connecting the locking part and the mount part. The locking part is disposed at a position spaced apart from the casing horizontally and vertically upward. The locking part contacts and engages the vertically upper face of part of the hanging tool inserted into a space surrounded by the locking part, the mount part, and the connection part.

Abstract: A semiconductor memory device includes a stacked structure and a memory pillar. The stacked structure includes electrode layers and insulating layers alternately provided on a substrate. The memory pillar extends through the stacked structure in a thickness direction. The memory pillar includes a semiconductor layer extending along the thickness direction, and a first insulating film, a charge storage layer, and a second insulating film provided around the semiconductor layer. The charge storage layer contains fluorine, and a fluorine concentration in the charge storage layer has a gradient along a plane direction of the substrate with a peak. A first distance from an inner end of the charge storage layer to the peak in the plane direction is shorter than a second distance from an outer end of the charge storage layer to the peak in the plane direction.

Abstract: In one embodiment, a semiconductor device includes a stacked film including a plurality of electrode layers and a plurality of insulating layers alternately stacked in a first direction. The device further includes a columnar portion including a charge storage layer and a first semiconductor layer extending through the stacked film in the first direction, the first semiconductor layer including an impurity element. The device further includes a second semiconductor layer or a first insulator provided on the stacked film and the columnar portion, the second semiconductor layer or the first insulator including the impurity element and having a concentration gradient of the impurity element in the first direction.

Abstract: A semiconductor storage device relating to one embodiment includes: a stacked body in which electrode films and insulating films are alternately stacked in a first direction; a first and a second charge storage films that are arranged away from each other in the first direction inside the stacked body and each face one of the electrode films; and a tunnel insulating film that extends in the first direction inside the stacked body and is in contact with the first and the second charge storage films. The first and the second charge storage films each include a first film that is in contact with the electrode film and contains a High-k material, and a second film that is provided between the first film and the tunnel insulating film and contains silicon nitride.

Abstract: A semiconductor memory device includes a stacked structure and a memory pillar. The stacked structure includes electrode layers and insulating layers alternately provided on a substrate. The memory pillar extends through the stacked structure in a thickness direction. The memory pillar includes a semiconductor layer extending along the thickness direction, and a first insulating film, a charge storage layer, and a second insulating film provided around the semiconductor layer. The charge storage layer contains fluorine, and a fluorine concentration in the charge storage layer has a gradient along a plane direction of the substrate with a peak. A first distance from an inner end of the charge storage layer to the peak in the plane direction is shorter than a second distance from an outer end of the charge storage layer to the peak in the plane direction.

Abstract: A method of manufacturing a semiconductor device includes forming a stacked body including a plurality of first films and a plurality of second films that are alternately stacked, next forming, in the stacked body, an opening that extends in a thickness direction, then forming a first insulating film, a charge storage layer, a second insulating film, and a semiconductor layer on a side wall of the stacked body in the opening. The charge storage layer includes a silicon nitride film. The second insulating film includes a silicon oxynitride film. At least one of the silicon nitride film and the silicon oxynitride film is formed by using first gas containing silicon and second gas containing nitrogen and deuterium.

Abstract: Locking members disposed on a casing of an underfloor device for railway vehicles engage hanging tools disposed on the vehicle, whereby the underfloor device for railway vehicles is attached to the vehicle. The locking member is a hollow locking member that includes a locking part to contact and engage a vertically upper face of part of the hanging tool, a mount part attached to the casing, and a connection part connecting the locking part and the mount part. The locking part is disposed at a position spaced apart from the casing horizontally and vertically upward. The locking part contacts and engages the vertically upper face of part of the hanging tool inserted into a space surrounded by the locking part, the mount part, and the connection part.

Abstract: The objective is to obtain a charged particle accelerator where the amount of pattern data for operating an acceleration cavity and electromagnets based on time clocks is reduced and the pattern data communication time is shortened. An accelerator control apparatus provided in a charged particle accelerator of the present invention is characterized by including a clock generation unit that generates an acceleration cavity clock and an electromagnet clock that is synchronized with the acceleration cavity clock and has a frequency lower than that of the acceleration cavity clock; a high-frequency control unit that controls an acceleration cavity, based on an acceleration cavity pattern stored in a first pattern memory and the acceleration cavity clock; and a deflection electromagnet control unit that controls a deflection electromagnet, based on a deflection electromagnet pattern stored in a second pattern memory and the electromagnet clock.

Abstract: The objective is to obtain a charged particle accelerator where the amount of pattern data for operating an acceleration cavity and electromagnets based on time clocks is reduced and the pattern data communication time is shortened. An accelerator control apparatus provided in a charged particle accelerator of the present invention is characterized by including a clock generation unit that generates an acceleration cavity clock and an electromagnet clock that is synchronized with the acceleration cavity clock and has a frequency lower than that of the acceleration cavity clock; a high-frequency control unit that controls an acceleration cavity, based on an acceleration cavity pattern stored in a first pattern memory and the acceleration cavity clock; and a deflection electromagnet control unit that controls a deflection electromagnet, based on a deflection electromagnet pattern stored in a second pattern memory and the electromagnet clock.