Patents by Inventor Shunsuke Okada
Shunsuke Okada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12213063Abstract: A slice gateway connects one or more subslices in a network in which an E2E slice is made up of multiple subslices. The slice gateway receives an inspection packet, determines an output destination subslice of the inspection packet based on a distribution table, embeds an ID of the output destination subslice in a payload of the inspection packet, and outputs the packet that includes the embedded ID to the output destination subslice; and notifies a quality tabulation device of information regarding the inspection packet.Type: GrantFiled: July 30, 2019Date of Patent: January 28, 2025Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Takayuki Nakamura, Tomohiro Okada, Shunsuke Homma, Takuya Sato, Hidetaka Nishihara
-
Publication number: 20240421008Abstract: A semiconductor wafer temperature measurement method according to the present embodiment includes introducing an impurity into a first surface of a wafer to form an amorphous layer on a side of the first surface of the wafer. The present temperature measurement method includes measuring a first film thickness that is the film thickness of the amorphous layer. The present temperature measurement method includes thermally treating the wafer to recrystallize part of the amorphous layer. The present temperature measurement method includes measuring a second film thickness that is the film thickness of the amorphous layer after the thermal treatment. The present temperature measurement method includes measuring the temperature of the wafer at the thermal treatment based on a film thickness difference between the first film thickness and the second film thickness.Type: ApplicationFiled: June 10, 2024Publication date: December 19, 2024Applicant: Kioxia CorporationInventors: Shunsuke OKADA, Yoshifumi NISHIO
-
Publication number: 20240381647Abstract: In one embodiment, a semiconductor device includes a stacked film including a plurality of electrode layers and a plurality of insulating layers alternately stacked in a first direction. The device further includes a columnar portion including a charge storage layer and a first semiconductor layer extending through the stacked film in the first direction, the first semiconductor layer including an impurity element. The device further includes a second semiconductor layer or a first insulator provided on the stacked film and the columnar portion, the second semiconductor layer or the first insulator including the impurity element and having a concentration gradient of the impurity element in the first direction.Type: ApplicationFiled: July 23, 2024Publication date: November 14, 2024Applicant: Kioxia CorporationInventors: Tatsunori ISOGAI, Shunsuke OKADA, Tomonori AOYAMA, Masaki NOGUCHI
-
Publication number: 20240300997Abstract: Provided is a protein folding agent capable of folding a protein with high efficiency. A protein folding agent contains: as an active ingredient, at least one selected from compounds represented by formulas (1) to (14), salts thereof, and solvates thereof.Type: ApplicationFiled: March 2, 2022Publication date: September 12, 2024Applicant: TOHOKU UNIVERSITYInventors: Takahiro MURAOKA, Shunsuke OKADA, Yosuke MATSUMOTO, Masaki OKUMURA, Kenji INABA, Motonori MATSUSAKI
-
Patent number: 12048157Abstract: A semiconductor storage device of an embodiment includes: a laminated body including electrode layers and insulating layers alternately stacked in a first direction; a semiconductor layer disposed in the laminated body; a first insulating film disposed between the laminated body and the semiconductor layer; a charge storage film disposed between the laminated body and the first insulating film, thicknesses of the charge storage film in a second direction crossing the first direction in the regions corresponding to the electrode layers being different from that in the regions corresponding to the insulating layers, the charge storage film comprising: a second insulating film disposed between the laminated body and the first insulating film, and a third insulating film disposed between the second insulating film and the regions corresponding to the electrode layers, the third insulating film having a density different from that of the second insulating film.Type: GrantFiled: September 15, 2021Date of Patent: July 23, 2024Assignee: Kioxia CorporationInventors: Shunsuke Okada, Tatsunori Isogai, Masaki Noguchi
-
Publication number: 20240206173Abstract: According to one embodiment, a semiconductor device has a stack of first films and first insulating films stacked in a first direction. The first films include an electrode layer and a second insulating film on an upper face, a lower face, and a side face of the electrode layer. A semiconductor layer extends in the first direction. A charge accumulating layer is between the semiconductor layer and the film stack in a second direction and has first portions between the first films and the semiconductor layer and second portions between the first insulating films and the semiconductor layer. The first portions each have a first thickness in the second direction, and the second portions each have a second thickness less than the first in the second direction. First portions have a first width, and first films have a second width that is less than the first width.Type: ApplicationFiled: August 31, 2023Publication date: June 20, 2024Inventors: Shunsuke OKADA, Tatsunori ISOGAI
-
Patent number: 11862696Abstract: A semiconductor storage device relating to one embodiment includes: a stacked body in which electrode films and insulating films are alternately stacked in a first direction; a first and a second charge storage films that are arranged away from each other in the first direction inside the stacked body and each face one of the electrode films; and a tunnel insulating film that extends in the first direction inside the stacked body and is in contact with the first and the second charge storage films. The first and the second charge storage films each include a first film that is in contact with the electrode film and contains a High-k material, and a second film that is provided between the first film and the tunnel insulating film and contains silicon nitride.Type: GrantFiled: December 14, 2020Date of Patent: January 2, 2024Assignee: Kioxia CorporationInventors: Shunsuke Okada, Tomonori Aoyama, Tatsunori Isogai, Masaki Noguchi
-
Publication number: 20230096632Abstract: A semiconductor device manufacturing method includes forming a first film containing a first device on a first substrate, forming a second film containing a semiconductor layer on a second substrate, and changing the semiconductor layer into a porous layer. The method further includes forming a third film containing a second device on the second film, and bonding the first substrate and the second substrate to sandwich the first film, the third film, and the second film therebetween. The method further includes separating the first substrate and the second substrate from each other at a position of the second film.Type: ApplicationFiled: February 24, 2022Publication date: March 30, 2023Applicant: Kioxia CorporationInventors: Shunsuke OKADA, Tatsunori ISOGAI
-
Publication number: 20230075993Abstract: According to one embodiment, a semiconductor memory device comprises a substrate, a first conductive layer, and a second conductive layer arranged in this order in a first direction and separated from each other, a first semiconductor film extending in the first direction, intersecting the first conductive layer, and being in contact with the second conductive layer, and a first charge storage film arranged between the first semiconductor film and the first conductive layer, and being in contact with the second conductive layer, wherein the first semiconductor film includes a first portion formed of an n-type semiconductor at approximately a same height as the first conductive layer.Type: ApplicationFiled: December 8, 2021Publication date: March 9, 2023Applicant: Kioxia CorporationInventors: Koichi SAKATA, Shinya ARAI, Susumu HASHIMOTO, Akira MINO, Shunsuke OKADA, Keisuke NAKATSUKA
-
Publication number: 20220302165Abstract: A semiconductor storage device of an embodiment includes: a laminated body including electrode layers and insulating layers alternately stacked in a first direction; a semiconductor layer disposed in the laminated body; a first insulating film disposed between the laminated body and the semiconductor layer; a charge storage film disposed between the laminated body and the first insulating film, thicknesses of the charge storage film in a second direction crossing the first direction in the regions corresponding to the electrode layers being different from that in the regions corresponding to the insulating layers, the charge storage film comprising: a second insulating film disposed between the laminated body and the first insulating film, and a third insulating film disposed between the second insulating film and the regions corresponding to the electrode layers, the third insulating film having a density different from that of the second insulating film.Type: ApplicationFiled: September 15, 2021Publication date: September 22, 2022Applicant: Kioxia CorporationInventors: Shunsuke OKADA, Tatsunori ISOGAI, Masaki NOGUCHI
-
Patent number: 11390305Abstract: Locking members disposed on a casing of an underfloor device for railway vehicles engage hanging tools disposed on the vehicle, whereby the underfloor device for railway vehicles is attached to the vehicle. The locking member is a hollow locking member that includes a locking part to contact and engage a vertically upper face of part of the hanging tool, a mount part attached to the casing, and a connection part connecting the locking part and the mount part. The locking part is disposed at a position spaced apart from the casing horizontally and vertically upward. The locking part contacts and engages the vertically upper face of part of the hanging tool inserted into a space surrounded by the locking part, the mount part, and the connection part.Type: GrantFiled: March 9, 2017Date of Patent: July 19, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Tomoki Watanabe, Shunsuke Okada, Takayuki Kawaguchi
-
Patent number: 11282932Abstract: A semiconductor memory device includes a stacked structure and a memory pillar. The stacked structure includes electrode layers and insulating layers alternately provided on a substrate. The memory pillar extends through the stacked structure in a thickness direction. The memory pillar includes a semiconductor layer extending along the thickness direction, and a first insulating film, a charge storage layer, and a second insulating film provided around the semiconductor layer. The charge storage layer contains fluorine, and a fluorine concentration in the charge storage layer has a gradient along a plane direction of the substrate with a peak. A first distance from an inner end of the charge storage layer to the peak in the plane direction is shorter than a second distance from an outer end of the charge storage layer to the peak in the plane direction.Type: GrantFiled: March 3, 2020Date of Patent: March 22, 2022Assignee: KIOXIA CORPORATIONInventors: Shunsuke Okada, Tatsunori Isogai, Masaki Noguchi
-
Publication number: 20220013539Abstract: In one embodiment, a semiconductor device includes a stacked film including a plurality of electrode layers and a plurality of insulating layers alternately stacked in a first direction. The device further includes a columnar portion including a charge storage layer and a first semiconductor layer extending through the stacked film in the first direction, the first semiconductor layer including an impurity element. The device further includes a second semiconductor layer or a first insulator provided on the stacked film and the columnar portion, the second semiconductor layer or the first insulator including the impurity element and having a concentration gradient of the impurity element in the first direction.Type: ApplicationFiled: March 16, 2021Publication date: January 13, 2022Applicant: Kioxia CorporationInventors: Tatsunori ISOGAI, Shunsuke OKADA, Tomonori AOYAMA, Masaki NOGUCHI
-
Publication number: 20210296458Abstract: A semiconductor storage device relating to one embodiment includes: a stacked body in which electrode films and insulating films are alternately stacked in a first direction; a first and a second charge storage films that are arranged away from each other in the first direction inside the stacked body and each face one of the electrode films; and a tunnel insulating film that extends in the first direction inside the stacked body and is in contact with the first and the second charge storage films. The first and the second charge storage films each include a first film that is in contact with the electrode film and contains a High-k material, and a second film that is provided between the first film and the tunnel insulating film and contains silicon nitride.Type: ApplicationFiled: December 14, 2020Publication date: September 23, 2021Applicant: Kioxia CorporationInventors: Shunsuke OKADA, Tomonori AOYAMA, Tatsunori ISOGAI, Masaki NOGUCHI
-
Publication number: 20210083064Abstract: A semiconductor memory device includes a stacked structure and a memory pillar. The stacked structure includes electrode layers and insulating layers alternately provided on a substrate. The memory pillar extends through the stacked structure in a thickness direction. The memory pillar includes a semiconductor layer extending along the thickness direction, and a first insulating film, a charge storage layer, and a second insulating film provided around the semiconductor layer. The charge storage layer contains fluorine, and a fluorine concentration in the charge storage layer has a gradient along a plane direction of the substrate with a peak. A first distance from an inner end of the charge storage layer to the peak in the plane direction is shorter than a second distance from an outer end of the charge storage layer to the peak in the plane direction.Type: ApplicationFiled: March 3, 2020Publication date: March 18, 2021Inventors: Shunsuke OKADA, Tatsunori ISOGAI, Masaki NOGUCHI
-
Publication number: 20210083128Abstract: A method of manufacturing a semiconductor device includes forming a stacked body including a plurality of first films and a plurality of second films that are alternately stacked, next forming, in the stacked body, an opening that extends in a thickness direction, then forming a first insulating film, a charge storage layer, a second insulating film, and a semiconductor layer on a side wall of the stacked body in the opening. The charge storage layer includes a silicon nitride film. The second insulating film includes a silicon oxynitride film. At least one of the silicon nitride film and the silicon oxynitride film is formed by using first gas containing silicon and second gas containing nitrogen and deuterium.Type: ApplicationFiled: February 28, 2020Publication date: March 18, 2021Inventors: Masaki NOGUCHI, Tatsunori ISOGAI, Shunsuke OKADA
-
Publication number: 20190382036Abstract: Locking members disposed on a casing of an underfloor device for railway vehicles engage hanging tools disposed on the vehicle, whereby the underfloor device for railway vehicles is attached to the vehicle. The locking member is a hollow locking member that includes a locking part to contact and engage a vertically upper face of part of the hanging tool, a mount part attached to the casing, and a connection part connecting the locking part and the mount part. The locking part is disposed at a position spaced apart from the casing horizontally and vertically upward. The locking part contacts and engages the vertically upper face of part of the hanging tool inserted into a space surrounded by the locking part, the mount part, and the connection part.Type: ApplicationFiled: March 9, 2017Publication date: December 19, 2019Applicant: Mitsubishi Electric CorporationInventors: Tomoki WATANABE, Shunsuke OKADA, Takayuki KAWAGUCHI
-
Patent number: 8772733Abstract: The objective is to obtain a charged particle accelerator where the amount of pattern data for operating an acceleration cavity and electromagnets based on time clocks is reduced and the pattern data communication time is shortened. An accelerator control apparatus provided in a charged particle accelerator of the present invention is characterized by including a clock generation unit that generates an acceleration cavity clock and an electromagnet clock that is synchronized with the acceleration cavity clock and has a frequency lower than that of the acceleration cavity clock; a high-frequency control unit that controls an acceleration cavity, based on an acceleration cavity pattern stored in a first pattern memory and the acceleration cavity clock; and a deflection electromagnet control unit that controls a deflection electromagnet, based on a deflection electromagnet pattern stored in a second pattern memory and the electromagnet clock.Type: GrantFiled: January 26, 2012Date of Patent: July 8, 2014Assignee: Mitsubishi Electric CorporationInventors: Masahiro Ikeda, Yuko Kijima, Shunsuke Okada
-
Publication number: 20130193353Abstract: The objective is to obtain a charged particle accelerator where the amount of pattern data for operating an acceleration cavity and electromagnets based on time clocks is reduced and the pattern data communication time is shortened. An accelerator control apparatus provided in a charged particle accelerator of the present invention is characterized by including a clock generation unit that generates an acceleration cavity clock and an electromagnet clock that is synchronized with the acceleration cavity clock and has a frequency lower than that of the acceleration cavity clock; a high-frequency control unit that controls an acceleration cavity, based on an acceleration cavity pattern stored in a first pattern memory and the acceleration cavity clock; and a deflection electromagnet control unit that controls a deflection electromagnet, based on a deflection electromagnet pattern stored in a second pattern memory and the electromagnet clock.Type: ApplicationFiled: January 26, 2012Publication date: August 1, 2013Applicant: Mitsubishi Electric CorporationInventors: Masahiro Ikeda, Yuko Kijima, Shunsuke Okada