Abstract: A biological information measurement apparatus includes: a pressure sensor including a pressure detecting element; a pressing mechanism which presses the pressure sensor against an artery in a living body; a press controller which controls a pressing force of the pressing mechanism; a blood flow sensor; a blood flow information measurer which measures blood flow information based on output of the blood flow sensor; a pressing force decider which decides a first pressing force based on blood flow information measured during a pressing force control time period when the pressing force is changed in one direction, and information of a pressure pulse wave detected during the pressing force control time period; and a record controller which records a pressure pulse wave detected in a first state where the pressing force is controlled to the first pressing force, and blood flow information measured in the first state.

Abstract: A biological information measurement apparatus includes: a pressure sensor including a pressure detecting element; a pressing mechanism which presses the pressure sensor against an artery in a living body; a press controller which controls a pressing force of the pressing mechanism; a blood flow sensor; a blood flow information measurer which measures blood flow information based on output of the blood flow sensor; a pressing force decider which decides a first pressing force based on blood flow information measured during a pressing force control time period when the pressing force is changed in one direction, and information of a pressure pulse wave detected during the pressing force control time period; and a record controller which records a pressure pulse wave detected in a first state where the pressing force is controlled to the first pressing force, and blood flow information measured in the first state.

Abstract: It is aimed to provide a semiconductor memory device capable of solving a half-select problem in 8Tr SRAMs and, simultaneously, achieving a reduction in charge/discharge power in a half-selected column, which has been a problem with the conventional write-back scheme. An 8Tr SRAM includes 1) a bitline half driver circuit which is capable of reading retention data from read bitline (RBL) of each memory cell of a memory cell group in a column direction and drives the write bitlines only for the memory cells of a half-selected column according to the read data, 2) a selection signal circuit to which an enable signal and a column selection signal of the bitline half driver circuit are input and which activates the bitline half driver circuit, and 3) an equalizer circuit which equalizes the write bitlines of the memory cell group in the column direction and does not precharge the write bitlines.