Abstract: A method for estimating performance values of chips includes: (A) using oscillation period vectors of a to-be-divide chip set to train a first neural network model to obtain a training error of the to-be-divided chip set, where in the first-time conducted step (A), the to-be-divided chip set includes the chips; (B) dividing the to-be-divided chip set into divided chip sets according to the training error; and (C) using oscillation period vectors of the divided chip sets as training data of a second neural network model, so that the second neural network model outputs weight vectors respectively corresponding to the divided chip sets. A product of oscillation period vector(s) of each divided chip set and a weight vector of the divided chip set is larger than a product of the oscillation period vector(s) of the divided chip set and a weight vector of each of rest of divided chip sets.

Abstract: A method includes steps of: storing an entry of sensing data in a storage area of a storage module of a board management controller as sensor data; assigning a buffer area of the storage module with a locked state; copying the sensor data from the storage area to the buffer area; and assigning the buffer area with an unlocked state. A processing module of the board management controller does not respond to a request to access the sensor data when the buffer area is assigned with the locked state, and responds to the request to access the sensor data when the buffer area is assigned with the unlocked state.

Abstract: A heterogeneous integration capacitor and a metal-oxide-metal (MoM) capacitor are provided. The heterogeneous integration capacitor has a first electrode and a second electrode, and includes a substrate, a semiconductor capacitor, the MoM capacitor, and a metal-insulator-metal (MiM) capacitor. These capacitors are sequentially formed on the substrate, and are formed as connected in parallel.

Abstract: An operation method of a software program meeting UEFI specifications for configuring a GPIO port is provided. The operation method includes: operating in a command-line mode to display, on a display device, a first prompt for guiding a user to input a string of command-line arguments; in response to receipt of a string of command-line arguments for reading content stored in a register that corresponds to one of GPIO pins of the GPIO port under the command-line mode, displaying, on the display device, a default value of the register that corresponds to a function of said one of the GPIO pins; and in response to receipt of a string of command-line arguments for setting a register that corresponds to one of the GPIO pins to a set value under the command-line mode, writing the set value to the register to replace a current value with the set value.

Abstract: A program signing method is provided to include: determining whether the signing program is tampered with; if not, obtaining a releasing hash that is related to a to-be-released program, and transmitting the releasing hash to a signature server unit, so as to make the signature server unit acquire a releasing digital signature based on the releasing hash and transmit the releasing digital signature to the processing module; and, upon receipt of the releasing digital signature, executing the signing program to generate a signed to-be-released program.

Abstract: A method for returning to a basic input/output system (BIOS) setup utility while in a shell environment during a booting process of a computing system includes: upon execution of an update Unified Extensible Firmware Interface (UEFI) (BIOS) firmware file, storing a dynamic command in a command storage; storing a back protocol in the storage module, the back protocol being linked to a back function that, when executed, causes the CPU to call a program file that, when executed by the CPU, causes the CPU to enter a BIOS setup utility, the dynamic command being linked to accessing a memory location in which the back protocol is stored; and in response to receipt of the dynamic command while in the shell environment, locating the back protocol, performing the back function and calling the specific program file, which causes the CPU to enter the BIOS setup utility.

Abstract: A radio frequency integrated circuit comprising: at least one transistor; a matching circuit coupled to said transistor; and at least one bump is used to form a passive element in said matching circuit, and said bump is used for radio frequency matching, the bumps can be used as passive components for amplifier harmonic impedance matching or the bumps can be the amplifier's passive components of the harmonic impedance matching, both of them can enhance the power, bandwidth and efficiency of amplifiers and integrated circuits.

Abstract: A method for returning to a basic input/output system (BIOS) setup utility while in a shell environment during a booting process of a computing system includes: upon execution of an update Unified Extensible Firmware Interface (UEFI) (BIOS) firmware file, storing a dynamic command in a command storage; storing a back protocol in the storage module, the back protocol being linked to a back function that, when executed, causes the CPU to call a program file that, when executed by the CPU, causes the CPU to enter a BIOS setup utility, the dynamic command being linked to accessing a memory location in which the back protocol is stored; and in response to receipt of the dynamic command while in the shell environment, locating the back protocol, performing the back function and calling the specific program file, which causes the CPU to enter the BIOS setup utility.

Abstract: An operation method of a software program meeting UEFI specifications for configuring a GPIO port is provided. The operation method includes: operating in a command-line mode to display, on a display device, a first prompt for guiding a user to input a string of command-line arguments; in response to receipt of a string of command-line arguments for reading content stored in a register that corresponds to one of GPIO pins of the GPIO port under the command-line mode, displaying, on the display device, a default value of the register that corresponds to a function of said one of the GPIO pins; and in response to receipt of a string of command-line arguments for setting a register that corresponds to one of the GPIO pins to a set value under the command-line mode, writing the set value to the register to replace a current value with the set value.

Abstract: A radio frequency integrated circuit comprising: at least one transistor; a matching circuit coupled to said transistor; and at least one bump is used to form a passive element in said matching circuit, and said bump is used for radio frequency matching, the bumps can be used as passive components for amplifier harmonic impedance matching or the bumps can be the amplifier's passive components of the harmonic impedance matching, both of them can enhance the power, bandwidth and efficiency of amplifiers and integrated circuits.

Abstract: A program signing method is provided to include: determining whether the signing program is tampered with; if not, obtaining a releasing hash that is related to a to-be-released program, and transmitting the releasing hash to a signature server unit, so as to make the signature server unit acquire a releasing digital signature based on the releasing hash and transmit the releasing digital signature to the processing module; and, upon receipt of the releasing digital signature, executing the signing program to generate a signed to-be-released program.

Abstract: A method of collecting error logs according to the disclosure includes generating, during procedure of BIOS of a server, at least one BIOS error log based on detection of an error condition of one or more of hardware devices and a CPU, transmitting the at least one BIOS error log to a BMC, storing the at least one BIOS error log received from the CPU, packaging the at least one BIOS error log and at least one log that is generated by the BMC and that is related to BMC sensors to generate an error log file, and storing the error log file.

Abstract: A method of data management is to be implemented by a baseboard management controller (BMC) of a server. The method includes: collecting normal (abnormal) operation information that is related to current statuses of hardware and firmware components; selecting a portion of the normal (abnormal) operation information; classifying each piece of data included in the portion of the normal (abnormal) operation information as a hardware class or a firmware class; and storing the portion of the normal (abnormal) operation information in the storage.

Abstract: A method of collecting error logs according to the disclosure includes generating, during procedure of BIOS of a server, at least one BIOS error log based on detection of an error condition of one or more of hardware devices and a CPU, transmitting the at least one BIOS error log to a BMC, storing the at least one BIOS error log received from the CPU, packaging the at least one BIOS error log and at least one log that is generated by the BMC and that is related to BMC sensors to generate an error log file, and storing the error log file.

Abstract: A wideband impedance matching network comprises a fundamental output MN including a first portion and a second portion and a harmonic compensation MN including a harmonic MN portion and a harmonic MN backside-via inductor formed on an outer surface of a harmonic MN backside via hole penetrating through a semiconductor substrate. The first portion, the second portion and the harmonic MN portion are formed on the semiconductor substrate. A second terminal of the first portion and a first terminal of the second portion are connected to an RF output terminal. A first terminal of the harmonic MN portion and a first terminal of the first portion are connected to an RF input terminal. A second terminal of the harmonic MN portion is connected to a first terminal of the harmonic MN backside-via inductor. A second terminal of the harmonic MN backside-via inductor is grounded.

Abstract: An epitaxial substrate and a method for forming the same are disclosed. The epitaxial substrate includes a substrate, a deposition layer, a buffer layer and an epitaxial layer. The deposition layer is directly formed on the substrate, wherein the deposition layer includes a gradient doping concentration, and has a first surface and a second surface which are opposite to each other; the gradient doping concentration has a minimum value at the first surface. The buffer layer is formed on the deposition layer, and an epitaxial layer is formed on the buffer layer. The epitaxial layer is mainly formed of group III-V nitride. The substrate and the deposition layer are formed of homogeneous material. Since the deposition layer is directly formed on the substrate, and the deposition layer and the substrate are formed of a homogeneous material, the epitaxial substrate includes a good heat dissipation efficiency and low leakage current.

Abstract: An epitaxial substrate and a method for forming the same are disclosed. The epitaxial substrate includes a substrate, a deposition layer, a buffer layer and an epitaxial layer. The deposition layer is directly formed on the substrate, wherein the deposition layer includes a gradient doping concentration, and has a first surface and a second surface which are opposite to each other; the gradient doping concentration has a minimum value at the first surface. The buffer layer is formed on the deposition layer, and an epitaxial layer is formed on the buffer layer. The epitaxial layer is mainly formed of group III-V nitride. The substrate and the deposition layer are formed of homogeneous material. Since the deposition layer is directly formed on the substrate, and the deposition layer and the substrate are formed of a homogeneous material, the epitaxial substrate includes a good heat dissipation efficiency and low leakage current.

Abstract: A radio frequency (RF) power transistor includes a semiconductor heterostructure, a gate electrode, a drain electrode and a source electrode. The drain electrode includes an ohmic contact and a Schottky contact extending from the ohmic contact toward the gate electrode, spaced apart from the gate electrode (4) by a distance (LGD), and having a length (LEXT) being not less than 2 ?m and not greater than 4 ?m. A ratio of the length (LEXT) to a sum of the length (LEXT) and a distance (LGD) is greater than 0.83 and less than 0.98.

Abstract: A Schottky barrier diode includes a substrate, a buffer layer formed on the substrate, an upper layer formed on the buffer layer, a first electrode layer formed on the upper layer as an anode of the Schottky barrier diode, a second electrode layer formed on the upper layer as a cathode of the Schottky barrier diode, and a first n-type doping region formed in the upper layer and under the first electrode layer, and contacting the first electrode layer. An edge of the first n-type doping region and an edge of the first electrode layer are separated by a first predetermined distance at a first direction at which the first electrode layer faces the second electrode layer.

Abstract: A radio frequency (RF) power transistor includes a semiconductor heterostructure, a gate electrode, a drain electrode and a source electrode. The drain electrode includes an ohmic contact and a Schottky contact extending from the ohmic contact toward the gate electrode, spaced apart from the gate electrode (4) by a distance (LGD), and having a length (LEXT) being not less than 2 ?m and not greater than 4 ?m. A ratio of the length (LEXT) to a sum of the length (LEXT) and a distance (LGD) is greater than 0.83 and less than 0.98.