Abstract: A post-cursor compensation system includes a state detector that receives a signal on a data line to detect a predefined state, and accordingly generates a clear control signal; a synchronization detector that receives the signal on the data line and the clear control signal to detect at least one synchronization state, and accordingly generates a trigger signal; and a compensation generator that receives the trigger signal and accordingly generates a compensation signal.

Abstract: A High-Definition Multimedia Interface (HDMI) receiving circuit receives an image signal and an input clock transmitted via HDMI and generates output data. The HDMI receiving circuit includes: a sampling circuit, sampling the image signal according to a transmission mode and the input clock to generate the output data; a data comparison circuit, coupled to the sampling circuit, determining whether the output data includes predetermined data to generate a determination result; and a control circuit, coupled to the sampling circuit and the data comparison circuit, determining the transmission mode according to the determination result.

Abstract: A High-Definition Multimedia Interface (HDMI) receiving circuit receives an image signal and an input clock transmitted via HDMI and generates output data. The HDMI receiving circuit includes: a sampling circuit, sampling the image signal according to a transmission mode and the input clock to generate the output data; a data comparison circuit, coupled to the sampling circuit, determining whether the output data includes predetermined data to generate a determination result; and a control circuit, coupled to the sampling circuit and the data comparison circuit, determining the transmission mode according to the determination result.

Abstract: An integrated circuit capable of preventing current backflow to a power line is provided. The integrated circuit includes an input circuit. The input circuit includes a bonding pad and a pull-up circuit, a pull-up switch, a bulk controlled switch and a control circuit. The pull-up switch includes a first control node and a first bulk node. The bulk controlled switch includes a second control node and a second bulk node. The control circuit controls the first and second control nodes according to an internal signal, a power voltage of the power line and a pad voltage of the bonding pad. When the power voltage is a predetermined voltage, the control circuit turns on the bulk controlled switch. When the power line is at a ground voltage and the bonding pad voltage is at the predetermined voltage, the control circuit turns off the bulk controlled switch and the pull-up switch.

Abstract: An integrated circuit capable of preventing current backflow to a power line is provided. The integrated circuit includes an input circuit. The input circuit includes a bonding pad and a pull-up circuit, a pull-up switch, a bulk controlled switch and a control circuit. The pull-up switch includes a first control node and a first bulk node. The bulk controlled switch includes a second control node and a second bulk node. The control circuit controls the first and second control nodes according to an internal signal, a power voltage of the power line and a pad voltage of the bonding pad. When the power voltage is a predetermined voltage, the control circuit turns on the bulk controlled switch. When the power line is at a ground voltage and the bonding pad voltage is at the predetermined voltage, the control circuit turns off the bulk controlled switch and the pull-up switch.

Abstract: A multiplexer is provided. The multiplexer includes an output coupled to a complementary driving unit and a plurality of switch circuits. Each switch circuit includes a channel unit and two switches. The two switches respectively conduct two input signals to a channel end of the channel unit during different switch conduction periods, and the channel unit conducts the channel end to an output end during a channel conduction period. The switch conduction period of the first switch in the first switch circuit equals the switch conduction period of the second switch circuit, the switch conduction period of the second switch in the second switch circuit equals the switch conduction period of the first switch circuit, and the first and second switches are coupled to the same input signal.

Abstract: A multiplexer is provided. The multiplexer includes an output coupled to a complementary driving unit and a plurality of switch circuits. Each switch circuit includes a channel unit and two switches. The two switches respectively conduct two input signals to a channel end of the channel unit during different switch conduction periods, and the channel unit conducts the channel end to an output end during a channel conduction period. The switch conduction period of the first switch in the first switch circuit equals the switch conduction period of the second switch circuit, the switch conduction period of the second switch in the second switch circuit equals the switch conduction period of the first switch circuit, and the first and second switches are coupled to the same input signal.