Abstract: An exemplary light source device (10) includes a power supply (12), a light source (14), and a photodetector (16). The photodetector includes a light sensor (17) and a resistor (18) connected in parallel. The power supply, the light source, and the photodetector are connected in series. When the intensity of ambient light increases, a resistance of the light sensor decreases so as to increase a light intensity of the light source. When the intensity of ambient light decreases, the resistance of the light sensor increases so as to decrease the light intensity of the light source.

Abstract: An exemplary read only memory cell (200) includes a semiconductor layer (220), a gate stack (230), and a gate electrode (240). The gate stack includes a tunnel film (231), a charge storing layer (232), and a block layer (233) sequentially stacked adjacent to the semiconductor layer. The gate electrode is adjacent to the block layer. The charge storing layer is configured to store charges when data is written to the read only memory cell. The charge storing layer comprises at least two sub-layers having different molecular structures of material such that a plurality of interfacial traps is provided where the at least two sub-layers adjoin each other. A method for manufacturing the read only memory cell is also provided.

Abstract: An exemplary damascene interconnect structure includes a substrate (20), a first dielectric layer (21) on the substrate, a plurality of trenches (27) formed in the first dielectric layer, and a plurality of metal lines (24) filled in the trenches. The first dielectric layer includes multi sub-dielectric layers (211, 212, 213). Wherein a plurality of air gaps (28) are maintained between the metal lines and at least one of the sub-dielectric layers. A method for fabricating the damascene interconnect structure is also provided.

Abstract: An exemplary method for manufacturing a thin film transistor includes: forming at least two photo-resist layers on a substrate, a developing speed of an upper one of the photo-resist layers being less than that of each photo-resist layer below said upper one of the photo-resist layers; exposing and developing the photo-resist layers, thereby forming residual photo-resist layers having a reduced width from top to bottom; subsequently depositing a plurality of metal layers on the substrate having the residual photo-resist layers; removing the residual photo-resist layers and the metal layers deposited on the photo-resist layers, thereby forming a gate electrode which includes residual metal layers and which has an increased width from top to bottom; forming a gate insulation layer on the substrate having the gate electrode; forming a semiconductor layer on the gate insulation layer; and forming a source electrode and a drain electrode on the semiconductor layer.

Abstract: An exemplary thin film transistor substrate (30) includes a bas substrate (31) and a gate electrode (32) formed on the bas substrate. The gate electrode includes a bonding layer (321) formed on the bas substrate and an electrically conductive layer (322) formed on the bonding layer. The bonding layer includes one of aluminum oxide and zirconium dioxide.

Abstract: An exemplary thin film transistor (TFT) array substrate (200) includes: a substrate (210), a gate electrode (220) disposed on the substrate, a gate insulating layer (230) disposed on the substrate having the gate electrode, a lightly doped amorphous silicon (a-Si) layer (241) disposed on the gate insulating layer, a first a-Si layer (242) disposed on the lightly doped a-Si layer, a source electrode (251) and a drain electrode (252) disposed on the gate insulating layer and the a-Si layer. The thin film transistor array substrate has a low leakage current.

Abstract: An exemplary method for fabricating a polysilicon layer includes the following steps. A substrate (10) is provided and an amorphous silicon layer (12) is formed over the substrate. An excimer laser generator (13) for generating a pulse excimer laser beams collectively having the shape of a generally rectangular shaft is provided to melt a first area (15) of the amorphous silicon layer with the pulse excimer laser beams. The excimer laser generator is moved a distance to melt a second area of the amorphous layer spaced a short distance away from the first area. At least a subsequent third melted area spaced a short distance away from the second melted area is formed, with each subsequent melted area is spaced as short distance away from the immediately preceding melted area.

Abstract: A circuitry testing method, comprising: providing a circuit board needing testing; applying a potential(160) to the circuit board needing testing so that the circuit board works and operating elements of the circuit board needing testing emit infrared rays; testing an intensity of radiation of the infrared rays using an infrared sensor(110); converting the radiation intensity to RGB(red, green, blue) data signals in order to form a diagnostic infrared image, using a processor(130); providing a standard infrared image; comparing the diagnostic infrared image with the standard infrared image; and determining whether the circuit board is defective according to the comparison.

Abstract: An exemplary thin film transistor array substrate (200) includes a substrate (210) and a gate electrode (220) formed on the substrate. The gate electrode includes an adhesive layer (226) formed on the substrate, a conductive layer (224) formed on the adhesive layer and a barrier layer (222) formed on the conductive layer, the adhesive layer and the barrier layer both have sandwich structures. A central core of the adhesive layer, the conductive layer, and a central core of the barrier layer are made of a same material.

Abstract: An exemplary organic light emitting display (200) includes a substrate (20), a first electrode layer (22), an organic layer (23), and a second electrode layer (21). The first electrode layer is disposed at the substrate. The organic layer is disposed at the first electrode layer. The second electrode layer includes a photic layer (210) disposed on the organic layer, an absorbing layer (211) disposed on the photic layer, and a metal layer (212) disposed on the absorbing layer. The absorbing layer is configured to absorb light beams passing through the photic layer. A method for manufacturing the organic light emitting display is also provided.

Abstract: An exemplary field emission display includes a first substrate (21) and a second substrate (22) being at opposite sides of the field emission display, a metal layer (210) disposed on an inner surface of the first substrate, a transparent electrode (221) disposed on an inner surface of the second substrate and spaced apart from the metal layer, a fluorescent layer (223) disposed on the transparent electrode, and a poly-silicon layer (212) disposed on the metal layer. The poly-silicon layer defines a plurality of tips (218) pointing toward the fluorescent layer. A method for manufacturing a field emission display is also provided.

Abstract: An exemplary frame assembly (20) includes a first frame (21), a second frame (22), a third frame (23) accommodating at least part of the first frame and at least part of the second frame. The first, second and third frames cooperatively define an accommodating space of the frame assembly, and the positions of the first frame and the second frame relative to each other are adjustable such that the accommodating space has a desired size.

Abstract: An exemplary dynamic random access memory includes a first transistor (210), a second transistor (220) and a comparator (230). The first transistor includes a first gate electrode (211), a first source electrode (213) and a first drain electrode (215). The second transistor includes a second gate electrode (221), a second source electrode (223) and a second drain electrode (225). The first source electrode is connected with the second source electrode. The first drain electrode is an input terminal for inputting a message. The comparator is connected to the second drain electrode, and preconfigured with a reference current. The comparator compares the reference current and a current through the second drain electrode to define a state of the current read from the comparator.

Abstract: An exemplary liquid crystal display (LCD) panel (22) includes a display area (251) and a non-display area (252). The non-display area has a photoelectric cell unit (254) provided thereat. The photoelectric cell unit is configured to generate electrical power when irradiated by light. An LCD device using the LCD panel, and a mobile phone using the LCD device, are also provided.

Abstract: An exemplary TFT substrate (300) includes a substrate (310), a silicon layer (320), a insulating layer (330, 340), and a metal layer (350), the metal layer, the insulating layer, the silicon layer being formed on the substrate in that order from top to bottom. The insulating layer comprises a first insulating layer (330) and a second insulating (340), the second insulating layer covering part of the first insulating layer.

Abstract: An exemplary anti-interference wiring assembly for a liquid crystal display device includes a base substrate (210), gate lines (201) formed at the base substrate, anti-interference wires (230), and data lines (202). The anti-interference wires are provided between the gate lines and the data lines and are insulated from the gate lines and the data lines respectively. The anti-interference wires are configured for carrying signals having a reverse phase compared to signals carried by the corresponding gate lines.

Abstract: An exemplary TFT array substrate (200) includes a glass substrate (201); a source electrode (215), a channel (212), and a drain electrode (216) formed on the substrate, the channel being between the source electrode and the drain electrode; a gate insulating layer (203) formed on the channel; a gate electrode (214) formed on the gate insulating layer, and corresponding to the channel; and a passivation layer (206) formed on the source electrode, the drain electrode, the passivation layer having a dielectric constant less than that of the gate insulating layer. A width of the gate insulating layer is less than a corresponding width of each of the gate electrode and the channel, and portions of the passivation layer are located adjacent the gate insulating layer between the gate electrode and the channel.

Abstract: A method of manufacturing a floating gate is provided. The method includes the steps of forming a tunneling layer on a substrate, and forming a film layer containing a semiconductor component on the tunneling layer. The film layer consists of a semiconductor film or nano-dots.

Abstract: An exemplary liquid crystal display device (3) includes a first substrate (31), a second substrate (32) opposite to the first substrate, and a liquid crystal layer (34) disposed between the first and second substrates. A number of data lines (322) is disposed on the first substrate. A number of photospacers (36) is disposed on one of the first and second substrates, and the photospacer is disposed over a corresponding one of the data lines and at least partly overlies the corresponding data line. The photospacers have a dielectric constant lower than 3.9. Thus, the liquid crystal display device has a lower coupling capacitance between the data lines and other elements. This facilitates a reduction crosstalk during operation of the liquid crystal display device, so that the liquid crystal display can provide better quality images.

Abstract: An exemplary thin film transistor (TFT) array substrate includes a glass substrate (430), a semiconductor layer (440) formed on the glass substrate, a gate insulating layer (407) formed on the semiconductor layer, and a plurality of gate electrodes (410) and common electrodes (411) formed on the gate insulating layer. A portion of the gate insulating layer corresponding to the common electrode includes introduced impurities to enhance a dielectric constant thereof. A method for manufacturing the TFT array substrate is also provided.