Abstract: A solar cell is provided. The substrate of the solar cell has heavily-doped regions and lightly-doped regions. The anode and the cathode are disposed on the back surface of the substrate, and thus the amount of incident light on the front surface of the substrate is increased. The anode and the cathode are in contact with the heavily doped regions to form selective emitter structure, and thus the contact resistance is reduced. The lightly-doped regions, which are not in contact with the anode and the cathode, have lower saturation current, and thus recombination of hole-electron pairs is reduced, and absorption of infrared light is increased.

Abstract: A solar cell includes a doped layer disposed on a first surface of a semiconductor substrate, a doped polysilicon layer disposed in a first region of a second surface of the semiconductor substrate, a doped area disposed in a second region of the second surface, and an insulating layer covering the doped polysilicon layer and the doped area. The insulating layer has openings exposing portions of the doped polysilicon layer and the doped layer, and the doped polysilicon layer and doped layer are respectively connected to a first electrode and a second electrode through the openings. The semiconductor substrate and the doped layer have a first doping type. One of the doped polysilicon layer and the doping area has a second doping type, and the other one of the doped polysilicon layer and the doping area has the first doping type which is opposite to the second doping type.

Abstract: A solar cell includes a doped layer disposed on a first surface of a semiconductor substrate, a doped polysilicon layer disposed in a first region of a second surface of the semiconductor substrate, a doped area disposed in a second region of the second surface, and an insulating layer covering the doped polysilicon layer and the doped area. The insulating layer has openings exposing portions of the doped polysilicon layer and the doped layer, and the doped polysilicon layer and doped layer are respectively connected to a first electrode and a second electrode through the openings. The semiconductor substrate and the doped layer have a first doping type. One of the doped polysilicon layer and the doping area has a second doping type, and the other one of the doped polysilicon layer and the doping area has the first doping type which is opposite to the second doping type.

Abstract: A solar cell is provided. The substrate of the solar cell has heavily-doped regions and lightly-doped regions. The anode and the cathode are disposed on the back surface of the substrate, and thus the amount of incident light on the front surface of the substrate is increased. The anode and the cathode are in contact with the heavily doped regions to form selective emitter structure, and thus the contact resistance is reduced. The lightly-doped regions, which are not in contact with the anode and the cathode, have lower saturation current, and thus recombination of hole-electron pairs is reduced, and absorption of infrared light is increased.

Abstract: A solar cell includes a doped layer disposed on a first surface of a semiconductor substrate, a doped polysilicon layer disposed in a first region of a second surface of the semiconductor substrate, a doped area disposed in a second region of the second surface, and an insulating layer covering the doped polysilicon layer and the doped area. The insulating layer has openings exposing portions of the doped polysilicon layer and the doped layer, and the doped polysilicon layer and doped layer are respectively connected to a first electrode and a second electrode through the openings. The semiconductor substrate and the doped layer have a first doping type. One of the doped polysilicon layer and the doping area has a second doping type, and the other one of the doped polysilicon layer and the doping area has the first doping type which is opposite to the second doping type.

Abstract: A solar cell includes a semiconductor substrate, a doping layer, a quantum well layer, a first passivation layer, a second passivation layer, a first electrode and a second electrode. The semiconductor substrate has a front surface and a back surface, and the front surface of the semiconductor substrate includes nano-rods. The doping layer covers the surface of the nano-rods. The electrode layers cover the doping layer. The quantum well layer having at least one first doping region and at least one second doping region is disposed on the semiconductor substrate. The quantum well layer includes polycrystalline silicon germanium (Si1-xGex). The first passivation layer and the second passivation layer cover the first and the second doping regions of the quantum well layer, respectively. The first electrode and the second electrode are electrically connected to the first doping region and the second doping region of the quantum well layer, respectively.

Abstract: A solar cell includes a crystalline silicon substrate, a plurality of P-type semiconductor material layers, a plurality of N-type semiconductor material layers, a plurality of first and second anode electric collection portions, at least one first electrode bus portion, a plurality of first and second cathode electric collection portions, at least one second electrode bus portion, and at least one third electrode bus portion. The first anode electric collection portions, the first electrode bus portion, the first cathode electric collection portions, the second electrode bus portion, the second anode electric collection portions, the second electrode bus portion, the second cathode electric collection portions, and the third electrode bus portion are arranged to form plural cell sub-units, such that an output voltage of the solar cell can be increased.

Abstract: A solar cell includes a semi-conductive substrate, a doping layer, an anti-reflection layer, an electrode, a passivation stacked layer and a contact layer. The semi-conductive substrate has a front and a back surface. The doping layer is disposed on the front surface. The anti-reflection layer is disposed on the doping layer. The electrode is disposed on the anti-reflection layer and electrically connected to the doping layer. The passivation stacked layer is disposed on the back surface and has a first dielectric layer, a second dielectric layer and a middle dielectric layer sandwiched between the first and the second dielectric layer. The dielectric constant of the middle dielectric layer is substantially lower than the dielectric constant of the first dielectric layer and the dielectric constant of the second dielectric layer. The contact layer covers the passivation stacked layer and electrically contacts with the back surface of the semi-conductive substrate.

Abstract: A solar cell includes a doped layer disposed on a first surface of a semiconductor substrate, a doped polysilicon layer disposed in a first region of a second surface of the semiconductor substrate, a doped area disposed in a second region of the second surface, and an insulating layer covering the doped polysilicon layer and the doped area. The insulating layer has openings exposing portions of the doped polysilicon layer and the doped layer, and the doped polysilicon layer and doped layer are respectively connected to a first electrode and a second electrode through the openings. The semiconductor substrate and the doped layer have a first doping type. One of the doped polysilicon layer and the doping area has a second doping type, and the other one of the doped polysilicon layer and the doping area has the first doping type which is opposite to the second doping type.

Abstract: A solar cell and method of fabricating the same are provided. The substrate of the solar cell has heavily-doped regions and lightly-doped regions. The anode and the cathode are disposed on the back surface of the substrate, and thus the amount of incident light on the front surface of the substrate is increased. The anode and the cathode are in contact with the heavily doped regions to form selective emitter structure, and thus the contact resistance is reduced. The lightly-doped regions, which are not in contact with the anode and the cathode, have lower saturation current, and thus recombination of hole-electron pairs is reduced, and absorption of infrared light is increased.

Abstract: A method for fabricating a thin film transistor is provided. A gate is formed on a substrate. A gate insulating layer is formed on the substrate to cover the gate. A metal oxide material layer is formed on the gate insulating layer. A photoresist layer is formed on the metal oxide material layer, in which a thickness of the photoresist layer above the gate is larger than that of the photoresist layer above two sides adjacent to the gate. A portion of the metal oxide material layer is removed to form a metal oxide active layer by using the photoresist layer as a mask. The photoresist layer above the two sides adjacent to the gate is removed and the remaining photoresist layer covers a portion of the metal oxide active layer. A source and a drain are formed on the metal oxide active layer covered by the photoresist layer.

Abstract: A solar cell includes a semiconductor substrate, a doping layer, a quantum well layer, a first passivation layer, a second passivation layer, a first electrode and a second electrode. The semiconductor substrate has a front surface and a back surface, and the front surface of the semiconductor substrate includes nano-rods. The doping layer covers the surface of the nano-rods. The electrode layers cover the doping layer. The quantum well layer having at least one first doping region and at least one second doping region is disposed on the semiconductor substrate. The quantum well layer includes polycrystalline silicon germanium (Si1-xGex). The first passivation layer and the second passivation layer cover the first and the second doping regions of the quantum well layer, respectively. The first electrode and the second electrode are electrically connected to the first doping region and the second doping region of the quantum well layer, respectively.

Abstract: A solar cell includes a semi-conductive substrate, a doping layer, an anti-reflection layer, an electrode, a passivation stacked layer and a contact layer. The semi-conductive substrate has a front and a back surface. The doping layer is disposed on the front surface. The anti-reflection layer is disposed on the doping layer. The electrode is disposed on the anti-reflection layer and electrically connected to the doping layer. The passivation stacked layer is disposed on the back surface and has a first dielectric layer, a second dielectric layer and a middle dielectric layer sandwiched between the first and the second dielectric layer. The dielectric constant of the middle dielectric layer is substantially lower than the dielectric constant of the first dielectric layer and the dielectric constant of the second dielectric layer. The contact layer covers the passivation stacked layer and electrically contacts with the back surface of the semi-conductive substrate.

Abstract: A solar cell includes a crystalline semiconductor substrate; a first crystalline semiconductor layer; an amorphous semiconductor layer; a first metal electrode layer and a second metal electrode layer. The crystalline semiconductor substrate has a first surface and a second surface, and the crystalline semiconductor substrate has a first doped type. The first crystalline semiconductor layer is disposed on the first surface of the crystalline semiconductor substrate, where the first crystalline semiconductor layer has a second doped type contrary to the first doped type. The amorphous semiconductor layer is disposed on the first crystalline semiconductor layer, and the amorphous semiconductor layer has the second doped type. The first metal electrode layer is disposed on the amorphous semiconductor layer. The second metal electrode layer is disposed on the second surface of the crystalline semiconductor substrate.

Abstract: A photovoltaic cell includes a first type doped mono-crystalline silicon substrate, an intrinsic amorphous silicon layer, a second type doped amorphous silicon layer, a first type doped crystalline Ge-containing layer, and a pair of electrodes. The first type doped mono-crystalline silicon substrate has a front surface and a rear surface. The intrinsic amorphous silicon layer is disposed on the front surface. The second type doped amorphous silicon layer is disposed on the intrinsic amorphous silicon layer. The first type doped crystalline Ge-containing layer is disposed on the rear surface. The pair of electrodes are electrically connected to the second type doped amorphous silicon layer and first type doped crystalline Ge-containing layer, respectively.

Abstract: A manufacturing method for a TFT electrode which is implemented to prevent metal ion diffusion to an adjacent insulating layer during fabrication. The method includes, in the order recited, providing a substrate; forming a first metal layer on the substrate which is comprised of one of a single metal layer structure or a multiple metal layer structure; performing a photolithography and etching process on the first metal layer to form a gate electrode of the TFT electrode; forming a transparent conducting electrode on the first metal layer to cover at least the gate electrode and prevent metal ion diffusion during fabrication, the transparent conducting electrode being comprised of one of indium tin oxide, indium zinc oxide, ZnO or an organic material; and forming a pixel electrode which functions as a barrier to prevent metal ion diffusion during fabrication by performing a photolithography and etching process on the transparent conducting electrode.

Abstract: A method for fabricating a thin film transistor is provided. A gate is formed on a substrate. A gate insulating layer is formed on the substrate to cover the gate. A metal oxide material layer is formed on the gate insulating layer. A photoresist layer is formed on the metal oxide material layer, in which a thickness of the photoresist layer above the gate is larger than that of the photoresist layer above two sides adjacent to the gate. A portion of the metal oxide material layer is removed to form a metal oxide active layer by using the photoresist layer as a mask. The photoresist layer above the two sides adjacent to the gate is removed and the remaining photoresist layer covers a portion of the metal oxide active layer. A source and a drain are formed on the metal oxide active layer covered by the photoresist layer.

Abstract: An etchant for patterning composite layer containing copper is provided. The etchant includes peracetic acid being about 5% to 40% by weight and serving as a major component, a peracetic acid stabilizer being about 5% to 15% by weight, an organic acid being about 5% to 10% by weight, an inorganic acid being about 5% to 15% by weight, a salt being about 8% to 15% by weight, which are based on the total weight of the etchant.

Abstract: An etchant for patterning composite layer containing copper is provided. The etchant includes peracetic acid being about 5% to 40% by weight and serving as a major component, a peracetic acid stabilizer being about 5% to 15% by weight, an organic acid being about 5% to 10% by weight, an inorganic acid being about 5% to 15% by weight, a salt being about 8% to 15% by weight, which are based on the total weight of the etchant.

Abstract: A method of fabricating of a metal line by a wet process is provided. A catalytic adhesive layer is formed on an insulating substrate. A fist metal layer is formed by an electoless plating process, and then, a second metal layer is formed by an electoless plating process or an electoplating process. The first and the second metal layers are patterned to form a metal line.