Abstract: A mixer having high linearity and an associated transconductor combining programmable gain amplifier and mixer functions are provided. The transconductor includes first and second resistors, a differential amplifier, first and second feedback circuits, and first and second transistors. A differential voltage signal is inputted to first and second input ends of the differential amplifier via the first and second resistors. The first and second feedback circuits are provided between a first output end and the first input end, and a second output end and the second input end of the differential amplifier, respectively. The first output end outputs a first output signal for controlling a first current passing through the first transistor. The second output end outputs a second output signal for controlling a second current passing through the second transistor. The first current and the second current determine a differential current.

Abstract: A mixer using a small signal differential model includes a load circuit, a switch quad, and a transconductor. The switch quad further including a first current path and a second current path is coupled to the load circuit. The connecting node of the switch quad and the load circuit is a differential-output terminal. The transconductor further includes a first resistor, a first operational amplifier, a second operational amplifier, a first current mirror, and a second current mirror. The resistor is coupled between two first input terminals of the first operational amplifier and the second operational amplifier. A current control terminal of the first current mirror is coupled to the first input terminal of the first operational amplifier, and a current mirroring terminal of the first current mirror is coupled to the first current path.

Abstract: A quadrature oscillator capable of lowering phase noise and power dissipation is disclosed. The oscillator circuit includes two symmetrical oscillators (11) (12) formed by cross-coupled transistor pairs with positive feedback structure to produce negative resistance, two LC circuits (13) (14) coupled to the above oscillators (11) (12) to produce positive resistance offsetting the negative resistance through the oscillators (11) (12), and two coupling circuits (15) (16) coupled to the oscillators (11) (12) to produce quadrature phase outputs, wherein, the transistor pairs in each coupling circuit (15) are respectively connected to the corresponding transistor pairs in the two oscillators (11) (12), to prevent the operating point of the oscillator transistors from shifting toward the linear region.

Abstract: A quadrature oscillator capable of lowering phase noise and power dissipation is disclosed. The oscillator circuit includes two symmetrical oscillators (11) (12) formed by cross-coupled transistor pairs with positive feedback structure to produce negative resistance, two LC circuits (13) (14) coupled to the above oscillators (11) (12) to produce positive resistance offsetting the negative resistance through the oscillators (11) (12), and two coupling circuits (15) (16) coupled to the oscillators (11) (12) to produce quadrature phase outputs, wherein, the transistor pairs in each coupling circuit (15) are respectively connected to the corresponding transistor pairs in the two oscillators (11) (12), to prevent the operating point of the oscillator transistors from shifting toward the linear region.

Abstract: A temperature compensating circuit for use with a current mirror circuit for maintaining a reference current value during temperature variations includes a compensating transistor connected in parallel with a reference current transistor and bias circuitry for biasing the compensating transistor whereby current flows from the reference node to ground through the compensating transistor to remove excess current from the reference transistor when temperature increases. A diode can be included in the bias circuitry for limiting bias current flow when the reference voltage drops below the voltage drop of the diode. An on/off switch circuit can be provided in parallel with the reference current transistor to further reduce reference current in specific applications.

Abstract: A temperature compensating circuit for use with a current mirror circuit for maintaining a reference current value during temperature variations includes a compensating transistor connected in parallel with a reference current transistor and bias circuitry for biasing the compensating transistor whereby current flows from the reference node to ground through the compensating transistor to remove excess current from the reference transistor when temperature increases. A diode can be included in the bias circuitry for limiting bias current flow when the reference voltage drops below the voltage drop of the diode. An on/off switch circuit can be provided in parallel with the reference current transistor to further reduce reference current in specific applications.

Abstract: Efficiency of an RF/microwave power amplifier is increased at a back-off power level by increasing the load resistance of the amplifier at the reduced output power level as compared to load impedance at a higher power level including full operating power. The different load impedances can be realized with two amplification units in parallel each having different load impedances. Alternatively, a single amplification path can be provided with an output impedance matching network which is selectively bypassed for increased impedance load during back-off power operation. In another embodiment, the output impedance matching network can include a shunt inductance which is selectively switched into the network to increase impedance for back-off power operation.

Abstract: An RF microwave power transistor has an input/output feed structure which functions as a low impedance microstrip line by providing a ground plane in close proximity to the feed structure on one surface of a semiconductor body. A second ground plane can be provided on an opposing surface of the semiconductor body with vias interconnecting the first and second ground planes. In addition to reducing feed impedance, a larger total transistor size can be provided before “odd mode oscillation” occurs.

Abstract: A hybrid microwave and millimeter wave integrated circuit (MMIC) RF power amplifier includes an integrated circuit in which an amplifier circuit is fabricated and an output impedance matching network comprising metal-insulator-metal (MIM) capacitors mounted on the integrated circuit chip with bonding wire inductors connecting the amplifier circuit with the capacitor elements. The resulting structure has a smaller form factor as compared to conventional power amplifiers employing planar transmission lines and surface mount technology capacitors.

Abstract: A hybrid microwave and millimeter wave integrated circuit (MMIC) RF power amplifier includes an integrated circuit in which an amplifier circuit is fabricated and an output impedance matching network comprising metal-insulator-metal (MIM) capacitors mounted on the integrated circuit chip with bonding wire inductors connecting the amplifier circuit with the capacitor elements. The resulting structure has a smaller form factor as compared to conventional power amplifiers employing planar transmission lines and surface mount technology capacitors.

Abstract: In an RF amplifier circuit having a plurality of transistor stages with each transistor having an input terminal for receiving an RF signal, a bias circuit is provided for applying a DC bias to the input terminal of a transistor. An isolation circuit connects a DC power supply to a bias circuit whereby DC voltage from the power terminal is applied to the bias circuit and RF signal from the transistor input terminal is attenuated. The isolation circuit includes a reactive serial path which allows the flow of DC current and presents an impedance to RF current flow and a reactive shunt path to ground which can comprise a capacitor or a serial inductor/capacitor circuit. The reactive serial path can comprise an inductor or an inductor/capacitor parallel circuit.