Abstract: A distributed control system includes a tree topology network or a daisy-chain network including a communication parent station, communication child stations, and a plurality of communication paths among the communication parent station and the communication child stations, in which the communication parent station and the communication child stations include a scheduling unit that controls a transfer cycle that is temporal intervals of data transfer. The scheduling unit sets the transfer cycle that is the fastest out of a plurality of the data as a reference cycle, counts the number of times each time the reference cycle elapses, and imparts a value of the number of times to the reference cycle as a cycle number. When the cycle number reaches an optional number, the number of times is returned to an initial value, which makes one cycle of transfer control, and the transfer control is repeatedly executed.

Abstract: A semiconductor device including a selection section that selects and outputs one video signal from plural input video signals; a clock signal output section that outputs a clock signal that corresponds to the video signal selected by the selection section; and a masking section that, for a predetermined period starting from a point when the clock signal output from the clock signal output section is switched in accordance with a switching of the selection of the video signal, performs masking processing on a synchronization signal that, among plural synchronization signals that correspond respectively to the plural video signals, corresponds to the video signal selected by the selection section. The selection section outputs the selected video signal in synchronization with the synchronization signal that corresponds to the selected video signal and that has undergone masking processing.

Abstract: A semiconductor device includes a first selecting portion and a selection signal generating portion. The first selecting portion is configured to select one of a plurality of video signals input thereto according to a first selection signal. Further, the first selecting portion is configured to output the one of the video signals thus selected in synchronization with a synchronization signal accompanied with the one of the video signals thus selected. The selection signal generating portion is configured to generate the first selection signal.

Abstract: A semiconductor device includes a first input unit for receiving a first signal; a first processing unit configured to perform a frequency dispersion processing on the first signal; a first output unit configured to output the first signal or the first signal on which the first processing unit performs the frequency dispersion processing; a second input unit configured to receive a second signal generated through performing a predetermined image processing with an image processing unit on the first signal output from the first output unit; a second processing unit configured to perform the frequency dispersion processing on the second signal; an enable signal input unit configured to receive an enable signal; and a second output unit configured to output one of the first signal and the second signal as an output signal according to the enable signal.

Abstract: A semiconductor device includes a first input unit for receiving a first signal; a first processing unit configured to perform a frequency dispersion processing on the first signal; a first output unit configured to output the first signal or the first signal on which the first processing unit performs the frequency dispersion processing; a second input unit configured to receive a second signal generated through performing a predetermined image processing with an image processing unit on the first signal output from the first output unit; a second processing unit configured to perform the frequency dispersion processing on the second signal; an enable signal input unit configured to receive an enable signal; and a second output unit configured to output one of the first signal and the second signal as an output signal according to the enable signal.

Abstract: A semiconductor device includes a first input unit for receiving a first signal; a first processing unit configured to perform a frequency dispersion processing on the first signal; a first output unit configured to output the first signal or the first signal on which the first processing unit performs the frequency dispersion processing; a second input unit configured to receive a second signal generated through performing a predetermined image processing with an image processing unit on the first signal output from the first output unit; a second processing unit configured to perform the frequency dispersion processing on the second signal; and a second output unit configured to output one of the first signal and the second signal as an output signal.

Abstract: The present disclosure provides a semiconductor device including: a selection section that selects and outputs one video signal from plural input video signals; a clock signal output section that outputs a clock signal that corresponds to the video signal selected by the selection section; and a masking section that, for a predetermined period starting from a point When the clock signal output from the clock signal output section is switched in accordance with a switching of the selection of the video signal, performs masking processing on a synchronization signal that, among plural synchronization signals that correspond respectively to the plural video signals, corresponds to the video signal selected by the selection section, wherein the selection section outputs the selected video signal in synchronization with the synchronization signal that corresponds to the selected video signal and that has undergone masking processing.

Abstract: A semiconductor device includes a first input unit; a second input unit; a first processing unit configured to perform a frequency dispersion processing on a first signal and a second signal; a first output unit configured to output one of the first signal and the second signal or one of the first signal and the second signal on which the first processing unit performs the frequency dispersion processing; a third input unit configured to receive a third signal generated through performing a predetermined image processing with an image processing unit on one of the first signal and the second signal; a second processing unit performing the frequency dispersion processing on the third signal; and a second output unit configured to output an output signal selected from one of the first signal, the second signal, and the third signal.

Abstract: A semiconductor device includes a first input unit for receiving a first signal; a first processing unit configured to perform a frequency dispersion processing on the first signal; a first output unit configured to output the first signal or the first signal on which the first processing unit performs the frequency dispersion processing; a second input unit configured to receive a second signal generated through performing a predetermined image processing with an image processing unit on the first signal output from the first output unit; a second processing unit configured to perform the frequency dispersion processing on the second signal; and a second output unit configured to output one of the first signal and the second signal as an output signal.

Abstract: A semiconductor device includes a first selecting portion and a selection signal generating portion. The first selecting portion is configured to select one of a plurality of video signals input thereto according to a first selection signal. Further, the first selecting portion is configured to output the one of the video signals thus selected in synchronization with a synchronization signal accompanied with the one of the video signals thus selected. The selection signal generating portion is configured to generate the first selection signal.

Abstract: A semiconductor device includes a first input unit; a second input unit; a first processing unit configured to perform a frequency dispersion processing on a first signal and a second signal; a first output unit configured to output one of the first signal and the second signal or one of the first signal and the second signal on which the first processing unit performs the frequency dispersion processing; a third input unit configured to receive a third signal generated through performing a predetermined image processing with an image processing unit on one of the first signal and the second signal; a second processing unit performing the frequency dispersion processing on the third signal; and a second output unit configured to output an output signal selected from one of the first signal, the second signal, and the third signal.

Abstract: The present invention provides a charged particle beam device in which the change of expansion/contraction of a specimen which is an observing object is restricted thereby eliminating position deviation of the observing object and significantly increasing its throughput. The present invention includes specimen holding means for holding a specimen, temperature regulation means which can regulate the temperature of the specimen, and temperature regulation means control means which can control the temperature regulation means based on various conditions.

Abstract: The present invention provides a charged particle beam device in which the change of expansion/contraction of a specimen which is an observing object is restricted thereby eliminating position deviation of the observing object and significantly increasing its throughput. The present invention includes specimen holding means for holding a specimen, temperature regulation means which can regulate the temperature of the specimen, and temperature regulation means control means which can control the temperature regulation means based on various conditions.

Abstract: A data transfer control circuit includes several data receiver-transmitters, each having an interrupt identification register. Interrupt signals from the data receiver-transmitters are combined into a single interrupt signal by an interrupt controller. One of the data receiver-transmitters has an interrupt status register with bits indicating the logic levels of the interrupt signals from each of the data receiver-transmitters. A host device that receives the interrupt signal from the interrupt controller can read the interrupt status register to determine which data receiver-transmitter caused the interrupt, then read the interrupt identification register of that data receiver-transmitter to identify the interrupt source, without having to search through the interrupt identification registers of other data receiver-transmitters.

Abstract: A data transfer control circuit includes several data receiver-transmitters, each having an interrupt identification register. Interrupt signals from the data receiver-transmitters are combined into a single interrupt signal by an interrupt controller. One of the data receiver-transmitters has an interrupt status register with bits indicating the logic levels of the interrupt signals from each of the data receiver-transmitters. A host device that receives the interrupt signal from the interrupt controller can read the interrupt status register to determine which data receiver-transmitter caused the interrupt, then read the interrupt identification register of that data receiver-transmitter to identify the interrupt source, without having to search through the interrupt identification registers of other data receiver-transmitters.