Patents by Inventor Shusaku Miyata
Shusaku Miyata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8334860Abstract: A semiconductor integrated circuit device includes a first high-speed serial interface circuit which has one differential serial data channel and a second high-speed serial interface circuit which has a plurality of differential serial data channels, the first high-speed serial interface circuit performs interface with the outside for control information, and a control circuit performs an internal operation on the basis of the control information. Both of the high-speed serial interface circuits share a RAM for storage of display data information. Whether the data information to be supplied to the RAM is received by using the first high-speed serial interface circuit or the second high-speed serial interface circuit is determined by the control circuit in accordance with the control information that is input to the first high-speed serial interface circuit.Type: GrantFiled: August 31, 2011Date of Patent: December 18, 2012Assignee: Renesas Electronics CorporationInventors: Shusaku Miyata, Hirofumi Sonoyama
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Publication number: 20120044218Abstract: A semiconductor integrated circuit device includes a first high-speed serial interface circuit which has one differential serial data channel and a second high-speed serial interface circuit which has a plurality of differential serial data channels, the first high-speed serial interface circuit performs interface with the outside for control information, and a control circuit performs an internal operation on the basis of the control information. Both of the high-speed serial interface circuits share a RAM for storage of display data information. Whether the data information to be supplied to the RAM is received by using the first high-speed serial interface circuit or the second high-speed serial interface circuit is determined by the control circuit in accordance with the control information that is input to the first high-speed serial interface circuit.Type: ApplicationFiled: August 31, 2011Publication date: February 23, 2012Inventors: SHUSAKU MIYATA, Hirofumi Sonoyama
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Patent number: 8018447Abstract: To provide an input interface technique of display data which can contribute to improvement of reliability and high performance of a system in which a semiconductor integrated circuit device including a RAM and a display driver circuit is incorporated. A semiconductor integrated circuit device includes a first high-speed serial interface circuit which has one differential serial data channel and a second high-speed serial interface circuit which has a plurality of differential serial data channels, the first high-speed serial interface circuit performs interface with the outside for control information, and a control circuit performs an internal operation on the basis of the control information. Both of the high-speed serial interface circuits share a RAM for storage of display data information.Type: GrantFiled: January 25, 2008Date of Patent: September 13, 2011Assignee: Renesas Electronics CorporationInventors: Shusaku Miyata, Hirofumi Sonoyama
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Patent number: 7982314Abstract: Circuit elements and wirings constituting a circuit, and first electrodes electrically connected to such a circuit are provided on one main surface of a semiconductor substrate. An organic insulating film is formed on the circuit except for openings on the surfaces of the first electrodes. First and second external connecting electrodes are provided on the organic insulating film. At least one conductive layer for electrically connecting the first and second external connecting electrodes and the first electrodes is placed on the organic insulating film.Type: GrantFiled: July 21, 2010Date of Patent: July 19, 2011Assignees: Renesas Electronics Corporation, Hitachi ULSI Systems Co., Ltd.Inventors: Masao Shinozaki, Kenji Nishimoto, Takashi Akioka, Yutaka Kohara, Sanae Asari, Shusaku Miyata, Shinji Nakazato
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Publication number: 20100308458Abstract: Circuit elements and wirings constituting a circuit, and first electrodes electrically connected to such a circuit are provided on one main surface of a semiconductor substrate. An organic insulating film is formed on the circuit except for openings on the surfaces of the first electrodes. First and second external connecting electrodes are provided on the organic insulating film. At least one conductive layer for electrically connecting the first and second external connecting electrodes and the first electrodes is placed on the organic insulating film.Type: ApplicationFiled: July 21, 2010Publication date: December 9, 2010Inventors: Masao Shinozaki, Kenji Nishimoto, Takashi Akioka, Yutaka Kohara, Sanae Asari, Shusaku Miyata, Shinji Nakazato
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Patent number: 7808107Abstract: Circuit elements and wirings constituting a circuit, and first electrodes electrically connected to such a circuit are provided on one main surface of a semiconductor substrate. An organic insulating film is formed on the circuit except for openings on the surfaces of the first electrodes. First and second external connecting electrodes are provided on the organic insulating film. At least one conductive layer for electrically connecting the first and second external connecting electrodes and the first electrodes is placed on the organic insulating film.Type: GrantFiled: May 8, 2009Date of Patent: October 5, 2010Assignees: Renesas Electronics Corporation, Hitachi ULSI Systems Co., Ltd.Inventors: Masao Shinozaki, Kenji Nishimoto, Takashi Akioka, Yutaka Kohara, Sanae Asari, Shusaku Miyata, Shinji Nakazato
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Publication number: 20100117081Abstract: A semiconductor integrated circuit device for driving an LCD, COG chip packaging is performed. To achieve this, an elongate and relatively thick gold bump electrode is formed over an aluminum-based pad having a relatively small area. In a wafer probe test performed after formation of the gold bump electrode, a cantilever type probe needle having gold as a main component and having an almost perpendicularly bent tip portion is used. The diameter of this probe needle in the vicinity of its tip is usually almost the same as the width of the gold bump electrode. This makes it difficult to perform the wafer probe test stably. To counteract this, a plurality of bump electrode rows for outputting a display device drive signal are formed such that the width of inner bump electrodes is made greater than the width of outer bump electrodes.Type: ApplicationFiled: October 8, 2009Publication date: May 13, 2010Applicant: RENESAS TECHNOLOGY CORP.Inventors: Atsushi OBUCHI, Kazuhisa HIGUCHI, Kazuo OKADO, Kazuto MITSUI, Shusaku MIYATA
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Publication number: 20090219069Abstract: Circuit elements and wirings constituting a circuit, and first electrodes electrically connected to such a circuit are provided on one main surface of a semiconductor substrate. An organic insulating film is formed on the circuit except for openings on the surfaces of the first electrodes. First and second external connecting electrodes are provided on the organic insulating film. At least one conductive layer for electrically connecting the first and second external connecting electrodes and the first electrodes is placed on the organic insulating film.Type: ApplicationFiled: May 8, 2009Publication date: September 3, 2009Inventors: Masao Shinozaki, Kenji Nishimoto, Takashi Akioka, Yutaka Kohara, Sanae Asari, Shusaku Miyata, Shinji Nakazato
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Patent number: 7547971Abstract: Circuit elements and wirings constituting a circuit, and first electrodes electrically connected to such a circuit are provided on one main surface of a semiconductor substrate. An organic insulating film is formed on the circuit except for openings on the surfaces of the first electrodes. First and second external connecting electrodes are provided on the organic insulating film. At least one conductive layer for electrically connecting the first and second external connecting electrodes and the first electrodes is placed on the organic insulating film.Type: GrantFiled: August 12, 2005Date of Patent: June 16, 2009Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.Inventors: Masao Shinozaki, Kenji Nishimoto, Takashi Akioka, Yutaka Kohara, Sanae Asari, Shusaku Miyata, Shinji Nakazato
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Publication number: 20080198148Abstract: To provide an input interface technique of display data which can contribute to improvement of reliability and high performance of a system in which a semiconductor integrated circuit device including a RAM and a display driver circuit is incorporated. A semiconductor integrated circuit device includes a first high-speed serial interface circuit which has one differential serial data channel and a second high-speed serial interface circuit which has a plurality of differential serial data channels, the first high-speed serial interface circuit performs interface with the outside for control information, and a control circuit performs an internal operation on the basis of the control information. Both of the high-speed serial interface circuits share a RAM for storage of display data information.Type: ApplicationFiled: January 25, 2008Publication date: August 21, 2008Inventors: Shusaku MIYATA, Hirofumi Sonoyama
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Publication number: 20060006480Abstract: Circuit elements and wirings constituting a circuit, and first electrodes electrically connected to such a circuit are provided on one main surface of a semiconductor substrate. An organic insulating film is formed on the circuit except for openings on the surfaces of the first electrodes. First and second external connecting electrodes are provided on the organic insulating film. At least one conductive layer for electrically connecting the first and second external connecting electrodes and the first electrodes is placed on the organic insulating film.Type: ApplicationFiled: August 12, 2005Publication date: January 12, 2006Inventors: Masao Shinozaki, Kenji Nishimoto, Takashi Akioka, Yutaka Kohara, Sanae Asari, Shusaku Miyata, Shinji Nakazato
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Patent number: 6963136Abstract: Circuit elements and wirings constituting a circuit, and first electrodes electrically connected to such a circuit are provided on one main surface of a semiconductor substrate. An organic insulating film is formed on the circuit except for openings on the surfaces of the first electrodes. First and second external connecting electrodes are provided on the organic insulating film. At least one conductive layer for electrically connecting the first and second external connecting electrodes and the first electrodes is placed on the organic insulating film.Type: GrantFiled: December 17, 2001Date of Patent: November 8, 2005Assignees: Renesas Technology Corporation, Hitachi ULSI Systems Co., Ltd.Inventors: Masao Shinozaki, Kenji Nishimoto, Takashi Akioka, Yutaka Kohara, Sanae Asari, Shusaku Miyata, Shinji Nakazato
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Publication number: 20040007778Abstract: Circuit elements and wirings constituting a circuit, and first electrodes electrically connected to such a circuit are provided on one main surface of a semiconductor substrate. An organic insulating film is formed on the circuit except for openings on the surfaces of the first electrodes. First and second external connecting electrodes are provided on the organic insulating film. At least one conductive layer for electrically connecting the first and second external connecting electrodes and the first electrodes is placed on the organic insulating film.Type: ApplicationFiled: June 19, 2003Publication date: January 15, 2004Inventors: Masao Shinozaki, Kenji Nishimoto, Takashi Akioka, Yutaka Kohara, Sanae Asari, Shusaku Miyata, Shinji Nakazato