Patents by Inventor Shusei Nemoto

Shusei Nemoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10472715
    Abstract: A nitride semiconductor template includes a heterogeneous substrate, a first nitride semiconductor layer that is formed on one surface of the heterogeneous substrate, includes a nitride semiconductor and has an in-plane thickness variation of not more than 4.0%, and a second nitride semiconductor layer that is formed on an annular region including an outer periphery of an other surface of the heterogeneous substrate, includes the nitride semiconductor and has a thickness of not less than 1 ?m.
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: November 12, 2019
    Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Shusei Nemoto, Taichiro Konno, Hajime Fujikura
  • Patent number: 10294566
    Abstract: There is provided a substrate processing apparatus, comprising: a substrate placing table which is provided to at least one of the temperature elevating part and the temperature lowering part formed in a container, and which causes heat-transfer to occur with the substrate placed on a placing surface; and a temperature control part which controls a temperature of the substrate placing table, wherein the temperature control part is configured to: control the temperature of the substrate placing table so that the temperature of the substrate to be loaded into the processing part is elevated to a predetermined temperature, before the substrate is placed on the substrate placing table, when the substrate placing table is provided to the temperature elevating part; and control the temperature of the substrate placing table so that the temperature of the processed substrate unloaded from the processing part is lowered to a predetermined temperature, before the substrate is placed on the substrate placing table, whe
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: May 21, 2019
    Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Hajime Fujikura, Taichiro Konno, Takayuki Numata, Shusei Nemoto
  • Patent number: 10084113
    Abstract: A nitride semiconductor template includes a substrate, an AlN layer that is formed on the substrate and that includes Cl, and a nitride semiconductor layer formed on the AlN layer. In the AlN layer, a concentration of the Cl in a region on a side of the substrate is higher than that in a region on a side of the nitride semiconductor layer. Also, a light-emitting element includes the nitride semiconductor template, and a light-emitting layer formed on the nitride semiconductor template.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: September 25, 2018
    Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Taichiro Konno, Hajime Fujikura, Shusei Nemoto
  • Publication number: 20180073139
    Abstract: There is provided a substrate processing apparatus, comprising: a substrate placing table which is provided to at least one of the temperature elevating part and the temperature lowering part formed in a container, and which causes heat-transfer to occur with the substrate placed on a placing surface; and a temperature control part which controls a temperature of the substrate placing table, wherein the temperature control part is configured to: control the temperature of the substrate placing table so that the temperature of the substrate to be loaded into the processing part is elevated to a predetermined temperature, before the substrate is placed on the substrate placing table, when the substrate placing table is provided to the temperature elevating part; and control the temperature of the substrate placing table so that the temperature of the processed substrate unloaded from the processing part is lowered to a predetermined temperature, before the substrate is placed on the substrate placing table, whe
    Type: Application
    Filed: December 22, 2015
    Publication date: March 15, 2018
    Applicant: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Hajime FUJIKURA, Taichiro KONNO, Takayuki NUMATA, Shusei NEMOTO
  • Publication number: 20180010246
    Abstract: A nitride semiconductor template includes a heterogeneous substrate, a first nitride semiconductor layer that is formed on one surface of the heterogeneous substrate, includes a nitride semiconductor and has an in-plane thickness variation of not more than 4.0%, and a second nitride semiconductor layer that is formed on an annular region including an outer periphery of an other surface of the heterogeneous substrate, includes the nitride semiconductor and has a thickness of not less than 1 ?m.
    Type: Application
    Filed: February 17, 2016
    Publication date: January 11, 2018
    Inventors: Shusei NEMOTO, Taichiro KONNO, Hajime FUJIKURA
  • Publication number: 20170141269
    Abstract: A nitride semiconductor template includes a substrate, an AlN layer that is formed on the substrate and that includes Cl, and a nitride semiconductor layer formed on the AlN layer. In the AlN layer, a concentration of the Cl in a region on a side of the substrate is higher than that in a region on a side of the nitride semiconductor layer. Also, a light-emitting element includes the nitride semiconductor template, and a light-emitting layer formed on the nitride semiconductor template.
    Type: Application
    Filed: January 31, 2017
    Publication date: May 18, 2017
    Inventors: Taichiro Konno, Hajime Fujikura, Shusei Nemoto
  • Patent number: 8796820
    Abstract: A semiconductor wafer having a disc shape includes a chamfer provided around a circumferential edge of the wafer, and an anti-cracking and chipping groove provided in one or more areas around one circumference of an end face of the wafer along a circumferential direction of the end face. The anti-cracking and chipping groove is configured to prevent cracking or chipping of the end face in back grinding.
    Type: Grant
    Filed: January 24, 2012
    Date of Patent: August 5, 2014
    Assignee: Hitachi Metals, Ltd.
    Inventors: Shusei Nemoto, Hisashi Mashiyama
  • Publication number: 20120187547
    Abstract: A semiconductor wafer having a disc shape includes a chamfer provided around a circumferential edge of the wafer, and an anti-cracking and chipping groove provided in one or more areas around one circumference of an end face of the wafer along a circumferential direction of the end face. The anti-cracking and chipping groove is configured to prevent cracking or chipping of the end face in back grinding.
    Type: Application
    Filed: January 24, 2012
    Publication date: July 26, 2012
    Applicant: Hitachi Cable, Ltd,
    Inventors: Shusei Nemoto, Hisashi Mashiyama