Patents by Inventor Shusuke KAWAI

Shusuke KAWAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240079946
    Abstract: In one embodiment, electronic circuitry includes an input terminal, a detection terminal, a diode having a cathode connected to the input terminal and an anode connected to the detection terminal, a resistor connected between the detection terminal and a first reference voltage, and a capacitor connected between the detection terminal and a second reference voltage. A voltage equal to a minimum value of a voltage applied to the input terminal is outputted from the detection terminal.
    Type: Application
    Filed: March 16, 2023
    Publication date: March 7, 2024
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shusuke KAWAI, Takeshi UENO
  • Publication number: 20240079970
    Abstract: In one embodiment, electronic circuitry includes a processing circuit. The processing circuit generates waveform data of a drive current to be supplied to the switching element, provides the waveform data to a drive circuit of the switching element, and at turn-on of the switching element, corrects the waveform data based on a load current flowing through a load connected to the switching element and a surge current of the switching element.
    Type: Application
    Filed: March 16, 2023
    Publication date: March 7, 2024
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shusuke KAWAI
  • Publication number: 20240048134
    Abstract: In one embodiment, electronic circuitry includes a reference circuit configured to generate a reference pulse signal synchronized with a clock signal on the basis of an input pulse signal, a delay circuit configured to delay the reference pulse signal and generate a delayed pulse signal, and an output circuit configured to output a pulse train including a plurality of pulses synchronized with the clock signal on the basis of the reference pulse signal and the delayed pulse signal, and the clock signal.
    Type: Application
    Filed: March 16, 2023
    Publication date: February 8, 2024
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shusuke KAWAI
  • Patent number: 11870432
    Abstract: Electronic circuitry includes a control circuit controlling a drive circuit for a semiconductor device; and a delay circuit receiving a first signal instructing the drive circuit to drive the semiconductor device with first driving force and output the first signal to the control circuit. The delay circuit receives a second signal at an interval of a first time or “n” times of the first time after the first signal is received, “n” being an integer greater than or equal to 2, and the second signal instructing the drive circuit to drive the semiconductor device with second driving force, delays outputting of the second signal for a delay time shorter than the first time, and outputs the second signal to the control circuit after the first signal is outputted and further after the first time or “n” times of the first time and the delay time elapses.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: January 9, 2024
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shusuke Kawai
  • Publication number: 20230299657
    Abstract: In one embodiment, electronic circuitry includes a driving circuit that is configured to: supply a driving current to a control terminal of a first switching element; and increase the driving current in accordance with a first time at which a current flowing through a second switching element connected to a first terminal or a second terminal of the first switching element becomes 0.
    Type: Application
    Filed: September 12, 2022
    Publication date: September 21, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, Toshiba Electronic Devices & Storage Corporation
    Inventor: Shusuke KAWAI
  • Publication number: 20230299767
    Abstract: According to one embodiment, a semiconductor device includes an n-layer and a p-layer arranged in a vertical trench structure in a drift layer. A depletion layer is formed to a depth of a trench of the vertical trench structure after a depletion layer spreads in a lateral direction between the n-layer and the p-layer when a voltage is applied between a drain and a source. A method for controlling the semiconductor device comprises detecting a voltage value between the drain and the source of the semiconductor device at turn-off and reducing a current value of a gate discharge current discharged from a gate in a first period. The first period starting before the detected voltage value greatly changes.
    Type: Application
    Filed: February 13, 2023
    Publication date: September 21, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Takenori YASUZUMI, Kohei HASEGAWA, Tsuguhiro TANAKA, Shusuke KAWAI
  • Patent number: 11698400
    Abstract: According to one embodiment, an electronic circuit includes an oscillator and a measuring circuit. The oscillator generates a first signal with a frequency corresponding to a time. The measuring circuit measures a first voltage based on a resonance frequency in a terminal of a semiconductor device where the first signal is supplied.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: July 11, 2023
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shusuke Kawai
  • Publication number: 20220077851
    Abstract: Electronic circuitry includes a control circuit controlling a drive circuit for a semiconductor device; and a delay circuit receiving a first signal instructing the drive circuit to drive the semiconductor device with first driving force and output the first signal to the control circuit. The delay circuit receives a second signal at an interval of a first time or “n” times of the first time after the first signal is received, “n” being an integer greater than or equal to 2, and the second signal instructing the drive circuit to drive the semiconductor device with second driving force, delays outputting of the second signal for a delay time shorter than the first time, and outputs the second signal to the control circuit after the first signal is outputted and further after the first time or “n” times of the first time and the delay time elapses.
    Type: Application
    Filed: February 26, 2021
    Publication date: March 10, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shusuke KAWAI
  • Patent number: 11211924
    Abstract: According to one embodiment, an electronic circuit includes: a current supply circuit, a detection circuit, a timing generation circuit, a sample hold circuit and a calculation circuit. The current supply circuit supplies a sine wave current for measurement to a gate terminal of a semiconductor switching device. The detection circuit detects a sine wave voltage generated in response to supply of the sine wave current to generate a detection signal. The timing generation circuit counts cycles of the sine wave voltage. The sample hold circuit samples the detection signal at a timing depending on a count value of the timing generation circuit. The calculation circuit calculates a gate resistance of the semiconductor switching device based on the sampled voltage.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: December 28, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shusuke Kawai
  • Patent number: 10998895
    Abstract: According to one embodiment, an electronic circuit includes a first delay element, a second delay element, a first hold circuit and a quantization circuit. The first delay element obtains a first signal by delaying a first pulse signal. The second delay element obtains a second signal by delaying the first signal. The first hold circuit holds a first voltage of an input signal corresponding to the first signal. The second hold circuit holds a second voltage of the input signal corresponding to the second signal. The quantization circuit obtains a third signal and a fourth signal each with different rising times based on a second pulse signal, to quantize the first voltage based on the third signal, and to quantize the second voltage based on the fourth signal.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: May 4, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shusuke Kawai
  • Patent number: 10988001
    Abstract: An air conditioning device for a vehicle includes a first flow path through which air subject to dehumidification flows, a second flow path through which air for recovery flows, a desiccant part and a controller. The desiccant part is fluidly communicated with the first and second flow paths, and configured to adsorb moisture contained in the air subject to dehumidification, and to discharge the moisture to the air for recovery. The controller is configured to control an air volume of the air subject to dehumidification and an air volume of the air for recovery so that the air volume of the air for recovery is less than the air volume of the air subject to dehumidification, after the air volume of the air for recovery reaches a prescribed air volume for achieving a target dehumidification amount of the air subject to dehumidification.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: April 27, 2021
    Assignee: MARELLI CABIN COMFORT JAPAN CORPORATION
    Inventors: Takashi Nakamura, Tomohiro Maruyama, Shusuke Kawai
  • Publication number: 20210072297
    Abstract: According to one embodiment, an electronic circuit includes an oscillator and a measuring circuit. The oscillator generates a first signal with a frequency corresponding to a time. The measuring circuit measures a first voltage based on a resonance frequency in a terminal of a semiconductor device where the first signal is supplied.
    Type: Application
    Filed: March 6, 2020
    Publication date: March 11, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shusuke KAWAI
  • Publication number: 20210075413
    Abstract: According to one embodiment, an electronic circuit includes a first delay element, a second delay element, a first hold circuit and a quantization circuit. The first delay element obtains a first signal by delaying a first pulse signal. The second delay element obtains a second signal by delaying the first signal. The first hold circuit holds a first voltage of an input signal corresponding to the first signal. The second hold circuit holds a second voltage of the input signal corresponding to the second signal. The quantization circuit obtains a third signal and a fourth signal each with different rising times based on a second pulse signal, to quantize the first voltage based on the third signal, and to quantize the second voltage based on the fourth signal.
    Type: Application
    Filed: March 10, 2020
    Publication date: March 11, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shusuke Kawai
  • Patent number: 10892749
    Abstract: An electronic circuit of the embodiments includes at least one first n-type transistor, at least one first p-type transistor, a supply circuit, a detection circuit, and a control circuit. The supply supplies current to a control terminal of a semiconductor switching element. The detection circuit acquires a value associated with a voltage at a first terminal of the semiconductor switching element. The control circuit causes one type of transistors of the first n-type transistors and the first p-type transistors to be in the non-driven state and causing at least one of the other type of transistors to be in the driven state, at least based on the value associated with the voltage. The first n-type transistor is electrically connected to a reference potential and the control terminal, and the first p-type transistor is electrically connected to a power supply potential and the control terminal.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: January 12, 2021
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shusuke Kawai
  • Patent number: 10778215
    Abstract: A switching control circuit has a detector to detect a difference between a control object signal of a switching element to drive a load and a target signal of the control object signal, and gate adjustment circuitry to search for the timing at which the difference becomes the smallest by sweeping timing of adjustment of a gate signal of the switching element.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: September 15, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONICS DEVICES & STORAGE CORPORATION
    Inventor: Shusuke Kawai
  • Publication number: 20200287533
    Abstract: An electronic circuit of the embodiments includes at least one first n-type transistor, at least one first p-type transistor, a supply circuit, a detection circuit, and a control circuit. The supply supplies current to a control terminal of a semiconductor switching element. The detection circuit acquires a value associated with a voltage at a first terminal of the semiconductor switching element. The control circuit causes one type of transistors of the first n-type transistors and the first p-type transistors to be in the non-driven state and causing at least one of the other type of transistors to be in the driven state, at least based on the value associated with the voltage. The first n-type transistor is electrically connected to a reference potential and the control terminal, and the first p-type transistor is electrically connected to a power supply potential and the control terminal.
    Type: Application
    Filed: August 27, 2019
    Publication date: September 10, 2020
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Shusuke KAWAI
  • Patent number: 10734989
    Abstract: According to one embodiment, an electronic circuit includes a plurality of first transistors, a control circuit, a sample hold circuit and a calculation circuit. The control circuit selectively performs a first operation and a second operation, the first operation supplying a driving control signal to a gate terminal of a semiconductor switching element using the plurality of first transistors, and the second operation supplying a pulse current for measurement to the gate terminal using part of the plurality of first transistors. The sample hold circuit samples a voltage of the gate terminal during a period in which the pulse current is supplied to the gate terminal in the second operation. The calculation circuit calculates a gate resistance of the semiconductor switching element based on the sampled voltage.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: August 4, 2020
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shusuke Kawai
  • Publication number: 20200091906
    Abstract: According to one embodiment, an electronic circuit includes: a current supply circuit, a detection circuit, a timing generation circuit, a sample hold circuit and a calculation circuit. The current supply circuit supplies a sine wave current for measurement to a gate terminal of a semiconductor switching device. The detection circuit detects a sine wave voltage generated in response to supply of the sine wave current to generate a detection signal. The timing generation circuit counts cycles of the sine wave voltage. The sample hold circuit samples the detection signal at a timing depending on a count value of the timing generation circuit. The calculation circuit calculates a gate resistance of the semiconductor switching device based on the sampled voltage.
    Type: Application
    Filed: March 1, 2019
    Publication date: March 19, 2020
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shusuke KAWAI
  • Publication number: 20200091907
    Abstract: According to one embodiment, an electronic circuit includes a plurality of first transistors, a control circuit, a sample hold circuit and a calculation circuit. The control circuit selectively performs a first operation and a second operation, the first operation supplying a driving control signal to a gate terminal of a semiconductor switching element using the plurality of first transistors, and the second operation supplying a pulse current for measurement to the gate terminal using part of the plurality of first transistors. The sample hold circuit samples a voltage of the gate terminal during a period in which the pulse current is supplied to the gate terminal in the second operation. The calculation circuit calculates a gate resistance of the semiconductor switching element based on the sampled voltage.
    Type: Application
    Filed: February 27, 2019
    Publication date: March 19, 2020
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shusuke KAWAI
  • Publication number: 20190288682
    Abstract: A switching control circuit has a detector to detect a difference between a control object signal of a switching element to drive a load and a target signal of the control object signal, and gate adjustment circuitry to search for the timing at which the difference becomes the smallest by sweeping timing of adjustment of a gate signal of the switching element.
    Type: Application
    Filed: September 12, 2018
    Publication date: September 19, 2019
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Shusuke KAWAI