Patents by Inventor Shusuke Saeki

Shusuke Saeki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10079051
    Abstract: There is provided an information processing apparatus including a region detection unit configured to detect a region that satisfies a predetermined condition among a plurality of regions included in a data storage apparatus, and a refresh processing unit configured to skip refresh with respect to the region that satisfies the predetermined condition when performing refresh processing on the plurality of regions.
    Type: Grant
    Filed: January 5, 2015
    Date of Patent: September 18, 2018
    Assignee: SONY CORPORATION
    Inventors: Kenji Fudono, Shusuke Saeki, Atsushi Ochiai, Kazumi Sato
  • Publication number: 20150199394
    Abstract: There is provided an information processing apparatus including a region detection unit configured to detect a region that satisfies a predetermined condition among a plurality of regions included in a data storage apparatus, and a refresh processing unit configured to skip refresh with respect to the region that satisfies the predetermined condition when performing refresh processing on the plurality of regions.
    Type: Application
    Filed: January 5, 2015
    Publication date: July 16, 2015
    Inventors: KENJI FUDONO, SHUSUKE SAEKI, ATSUSHI OCHIAI, KAZUMI SATO
  • Patent number: 8972659
    Abstract: There is provided a memory control device including a device driver that executes writing or reading of data to/from a main storage unit and temporary writing or reading of data to/from a cache unit including a plurality of cache blocks, and a control unit that issues an instruction for writing or reading of data of a file system to/from the main storage unit or the cache unit to the device driver. The control unit may notify priority information about a priority for data storage into a logical block to which the cache block is associated to the device driver.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: March 3, 2015
    Assignee: Sony Corporation
    Inventors: Hiroaki Ishizawa, Nobuhiro Kaneko, Shusuke Saeki, Takashi Kida, Tomohiro Katori
  • Publication number: 20140181378
    Abstract: There is provided a control device including, a reading and writing control unit configured to control writing and reading of data on and from a non-volatile memory that has a plurality of blocks each set to be a unit for performing erasure of data. The non-volatile memory stores order information indicating an order of the blocks in which data is to be written. The reading and writing control unit selects a writing target block that is a target block for writing of data according to the order indicated by the order information, and writes data in the selected writing target block.
    Type: Application
    Filed: December 13, 2013
    Publication date: June 26, 2014
    Applicant: SONY CORPORATION
    Inventors: Shusuke SAEKI, Kenji FUDONO, Nobuhiro KANEKO, Kazumi SATO
  • Publication number: 20130326123
    Abstract: There is provided a memory management device including a non-volatile memory that performs writing and reading of data on a per-page basis, and performs erasing on a per-block basis, and a control unit that manages a data process in the non-volatile memory by performing logical-physical translation on a per-translation unit (TU) basis, and performs a fold process. The control unit sets data of a physical TU corresponding to unnecessary logical TU information to be excluded from a copy target in the fold process based on the unnecessary logical TU information, the unnecessary logical TU information being notified of by a file system and representing a logical TU corresponding to a physical TU in which unnecessary data is physically written.
    Type: Application
    Filed: May 23, 2013
    Publication date: December 5, 2013
    Applicant: Sony Corporation
    Inventors: Shusuke SAEKI, Kenji FUDONO, Nobuhiro KANEKO, Kazumi SATO
  • Publication number: 20120239884
    Abstract: There is provided a memory control device including a device driver that executes writing or reading of data to/from a main storage unit and temporary writing or reading of data to/from a cache unit including a plurality of cache blocks, and a control unit that issues an instruction for writing or reading of data of a file system to/from the main storage unit or the cache unit to the device driver. The control unit may notify priority information about a priority for data storage into a logical block to which the cache block is associated to the device driver.
    Type: Application
    Filed: March 9, 2012
    Publication date: September 20, 2012
    Inventors: Hiroaki Ishizawa, Nobuhiro Kaneko, Shusuke Saeki, Takashi Kida, Tomohiro Katori
  • Publication number: 20120215964
    Abstract: There is provided a management device including a management unit that manages a nonvolatile memory configured to allow data to be written, read, or erased electrically, allow writing and reading to be performed in units of a page, and allow erasing to be performed in units of a block including a plurality of pages. The management unit divides a plurality of physical blocks of the nonvolatile memory into a virtual area including virtual blocks corresponding to the physical blocks, and an alternate area including alternate blocks for replacing defective physical blocks in the virtual area, manages the nonvolatile memory in management units of three stages including management of the physical blocks, management of the virtual blocks, and management of extended blocks, and writes to the nonvolatile memory first, second, and third management information for use in the management of the physical blocks, the virtual blocks, and the extended blocks, respectively.
    Type: Application
    Filed: January 25, 2012
    Publication date: August 23, 2012
    Inventors: Nobuhiro KANEKO, Shusuke Saeki, Kenji Fudono, Kazunori Yamamoto
  • Publication number: 20120166713
    Abstract: An administration device includes an administration section. The administration section administers writing, reading, and erasing of data in a nonvolatile memory, in which the data can be electrically written, read, and erased and the writing and the reading are performed on a page-by-page basis and the erasing is performed on a block-by-block basis, by translating a logical address into a physical address on a per translation unit basis; and performs fold processing of increasing unwritten physical translation units by the number of written invalid physical translation units, which are contained in a block of a copy source, by copying data of written valid physical translation units among the contents of the block into a block, in which the unwritten physical translation units reside, and by erasing the block of the copy source.
    Type: Application
    Filed: December 7, 2011
    Publication date: June 28, 2012
    Applicant: Sony Corporation
    Inventors: Shusuke SAEKI, Kenji FUDONO, Nobuhiro KANEKO, Hiroki NAGAHAMA, Kazunori YAMAMOTO
  • Patent number: 8205033
    Abstract: A memory device includes a non-volatile memory which allows data to be written, read, and erased electrically and in which writing and reading are done in units of a page and erasing is done in units of a block including a plurality of pages, and a control section that manages access to the non-volatile memory. The control section performs management of access to the non-volatile memory by performing logical address-physical address translation (logical-physical translation) in translation units (TUs) each being an integer fraction of a size of the block and an integer multiple of a page size.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: June 19, 2012
    Assignee: Sony Corporation
    Inventors: Shusuke Saeki, Satoru Iwasaki, Seiya Ichimori, Hiroki Nagahama, Kazumi Sato
  • Publication number: 20090119450
    Abstract: A memory device includes a non-volatile memory which allows data to be written, read, and erased electrically and in which writing and reading are done in units of a page and erasing is done in units of a block including a plurality of pages, and a control section that manages access to the non-volatile memory. The control section performs management of access to the non-volatile memory by performing logical address-physical address translation (logical-physical translation) in translation units (TUs) each being an integer fraction of a size of the block and an integer multiple of a page size.
    Type: Application
    Filed: November 5, 2008
    Publication date: May 7, 2009
    Inventors: Shusuke SAEKI, Satoru Iwasaki, Seiya Ichimori, Hiroki Nagahama, Kazumi Sato