Patents by Inventor Shuuji Kishi

Shuuji Kishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6218253
    Abstract: A method of manufacturing a transistor capable of obtaining a BICMOS while making the difference in the number of manufacturing processes from a CMOS smaller, includes the steps of: separating an element region in a semiconductor substrate; forming a emitter opening for deciding upon an emitter layer in an insulating film on the semiconductor substrate, forming a polysilicon film on the insulating film and in the emitter opening; implanting selectively impurity ions into the semiconductor substrate through the polysilicon film and the insulating film to form a collector layer and a base layer; and performing heat treatment for activating impurities in the base layer and the collector layer and diffusing impurities into the semiconductor substrate from the polysilicon film to form an emitter diffused layer.
    Type: Grant
    Filed: August 12, 1999
    Date of Patent: April 17, 2001
    Assignee: NEC Corporation
    Inventor: Shuuji Kishi
  • Patent number: 5985722
    Abstract: There is provided a semiconductor device including a transistor, said transistor having (a) a semiconductor substrate, (b) source and drain regions formed in the semiconductor substrate, (c) a gate electrode formed on the semiconductor substrate between the source and drain regions, (d) a silicide layer formed partially on one of the source and drain regions, and (e) an electrode terminal making contact with the silicide layer. The silicide layer extends so that it covers at least an area through which the electrode terminal makes contact with the drain region. In the above mentioned semiconductor device, since the silicide layer is formed only in the vicinity of an area through which the electrode terminal makes contact with the silicide layer, it is possible to construct an output transistor in LDD structure. Thus, there can be obtained an output transistor having higher ESD immunity, higher driving ability, and higher integration.
    Type: Grant
    Filed: August 13, 1997
    Date of Patent: November 16, 1999
    Assignee: NEC Corporation
    Inventor: Shuuji Kishi
  • Patent number: 5972766
    Abstract: A method of manufacturing a transistor capable of obtaining a BICMOS while making the difference in the number of manufacturing processes from a CMOS smaller, includes the steps of: separating an element region in a semiconductor substrate; forming a emitter opening for deciding upon an emitter layer in an insulating film on the semiconductor substrate, forming a polysilicon film on the insulating film and in the emitter opening; implanting selectively impurity ions into the semiconductor substrate through the polysilicon film and the insulating film to form: a collector layer and a base layer; and performing heat treatment for activating impurities in the base layer and the collector layer and diffusing impurities into the semiconductor substrate from the polysilicon film to form an emitter diffused layer.
    Type: Grant
    Filed: February 28, 1997
    Date of Patent: October 26, 1999
    Assignee: NEC Corporation
    Inventor: Shuuji Kishi