Abstract: There is provided a delay circuit that delays an input signal to output the delayed signal. The delay circuit includes a first delay element operable to receive the input signal and delay the input signal to output the delayed signal, a buffer operable to receive the delay signal output from the first delay element and correct a dullness of a waveform of the delay signal generated from the first delay element to output the corrected signal, and a second delay element operable to receive the delay signal output from the buffer and delay the delay signal to output the delayed signal.

Abstract: There is provided a delay circuit that delays an input signal to output the delayed signal. The delay circuit includes a first delay element operable to receive the input signal and delay the input signal to output the delayed signal, a buffer operable to receive the delay signal output from the first delay element and correct a dullness of a waveform of the delay signal generated from the first delay element to output the corrected signal, and a second delay element operable to receive the delay signal output from the buffer and delay the delay signal to output the delayed signal.

Abstract: There is provided a delay circuit that delays an input signal to output the delayed signal. The delay circuit includes a first delay element operable to receive the input signal and delay the input signal to output the delayed signal, a buffer operable to receive the delay signal output from the first delay element and correct a dullness of a waveform of the delay signal generated from the first delay element to output the corrected signal, and a second delay element operable to receive the delay signal output from the buffer and delay the delay signal to output the delayed signal.

Abstract: LSI test equipment can acquire output data of an LSI as a device under test by a clock signal output from the LSI to be measured and acquire measurement data synchronously with the output data having jitter. The LSI test equipment includes a clock side time interpolator for acquiring the clock output from the LSI to be measured by a plurality of strobes having a predetermined timing interval and outputting it as encoded level data of time series, a data side time interpolator for acquiring the output data from the LSI to be measured by a plurality of strobes having a predetermined timing interval and outputting it as level data of time series, and a selector for receiving the level data from both of the time interpolators, selecting output data at the clock edge timing, and outputting it as data to be measured.

Abstract: An LSI test equipment can acquire output data of an LSI as a device under test by a clock signal output from the LSI to be measured and acquire measurement data synchronously with the output data having jitter. The LSI test equipment (10) includes a clock side time interpolator (20) for acquiring the clock output from the LSI (1) to be measured by a plurality of strobes having a predetermined timing interval and outputting it as encoded level data of time series, a data side time interpolator (20) for acquiring the output data output from the LSI (1) to be measured by a plurality of strobes having a predetermined timing interval and outputting it as level data of time series, and a selector (30) for receiving the level data from both of the time interpolators, selecting output data at the clock edge timing, and outputting it as data to be measured.