Patents by Inventor Shu-Wen Chen

Shu-Wen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11968869
    Abstract: An electronic device includes a flexible substrate and a conductive wire. The conductive wire is disposed on the flexible substrate and includes a metal portion and a plurality of openings disposed in the metal portion. The metal portion includes a plurality of extending portions and a plurality of joint portions, and each of the openings is surrounded by two of the plurality of extending portions and two of the plurality of joint portions. A ratio of a sum of widths of the plurality of extending portions to a sum of widths of the plurality of joint portions is in a range from 0.8 to 1.2.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: April 23, 2024
    Assignee: InnoLux Corporation
    Inventors: Ya-Wen Lin, Chien-Chih Chen, Yen-Hsi Tu, Cheng-Wei Chang, Shu-Hui Yang
  • Patent number: 11955397
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: April 9, 2024
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shin-Cheng Lin, Cheng-Wei Chou, Ting-En Hsieh, Yi-Han Huang, Kwang-Ming Lin, Yung-Fong Lin, Cheng-Tao Chou, Chi-Fu Lee, Chia-Lin Chen, Shu-Wen Chang
  • Publication number: 20240088223
    Abstract: In a method of manufacturing a semiconductor device, a field effect transistor (FET) having a metal gate structure, a source and a drain over a substrate is formed. A first frontside contact disposed between dummy metal gate structures is formed over an isolation insulating layer. A frontside wiring layer is formed over the first frontside contact. A part of the substrate is removed from a backside of the substrate so that a bottom of the isolation insulating layer is exposed. A first opening is formed in the isolation insulating layer from the bottom of the isolation insulating layer to expose a bottom of the first frontside contact. A first backside contact is formed by filling the first opening with a conductive material to connect the first frontside contact.
    Type: Application
    Filed: March 24, 2023
    Publication date: March 14, 2024
    Inventors: Shu-Wen SHEN, Yen-Po Lin, Chun-Han Chen
  • Patent number: 11916091
    Abstract: A backside illumination (BSI) image sensor and a method of forming the same are provided. A device includes a substrate and a plurality of photosensitive regions in the substrate. The substrate has a first side and a second side opposite to the first side. The device further includes an interconnect structure on the first side of the substrate, and a plurality of recesses on the second side of the substrate. The plurality of recesses extend into a semiconductor material of the substrate.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Wen Hsu, Jiech-Fun Lu, Yeur-Luen Tu, U-Ting Chen, Shu-Ting Tsai, Hsiu-Yu Cheng
  • Publication number: 20230378283
    Abstract: A method of fabricating a semiconductor device is disclosed. The method includes separating an interlayer dielectric (ILD) into a plurality of portions. The plurality of portions of ILD, separated from each other along a first lateral direction and a second lateral direction, overlay a plurality of groups of epitaxial regions, respectively. The method includes performing an etching process to expose the plurality of groups of epitaxial regions, wherein the etching process comprises a plurality of stages, each of the stages comprising a respective etchant. The method includes forming a plurality of conductive contacts electrically coupled to the plurality of epitaxial regions, respectively.
    Type: Application
    Filed: July 31, 2023
    Publication date: November 23, 2023
    Applicant: Taiwan Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shu-Wen Chen, Guan-Ren Wang, Ching-Feng Fu
  • Patent number: 11757010
    Abstract: A method of fabricating a semiconductor device is disclosed. The method includes separating an interlayer dielectric (ILD) into a plurality of portions. The plurality of portions of ILD, separated from each other along a first lateral direction and a second lateral direction, overlay a plurality of groups of epitaxial regions, respectively. The method includes performing an etching process to expose the plurality of groups of epitaxial regions, wherein the etching process comprises a plurality of stages, each of the stages comprising a respective etchant. The method includes forming a plurality of conductive contacts electrically coupled to the plurality of epitaxial regions, respectively.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: September 12, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Shu-Wen Chen, Guan-Ren Wang, Ching-Feng Fu
  • Publication number: 20210336013
    Abstract: A method of fabricating a semiconductor device is disclosed. The method includes separating an interlayer dielectric (ILD) into a plurality of portions. The plurality of portions of ILD, separated from each other along a first lateral direction and a second lateral direction, overlay a plurality of groups of epitaxial regions, respectively. The method includes performing an etching process to expose the plurality of groups of epitaxial regions, wherein the etching process comprises a plurality of stages, each of the stages comprising a respective etchant. The method includes forming a plurality of conductive contacts electrically coupled to the plurality of epitaxial regions, respectively.
    Type: Application
    Filed: February 3, 2021
    Publication date: October 28, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shu-Wen Chen, Guan-Ren Wang, Ching-Feng Fu
  • Patent number: 9717753
    Abstract: The present invention provides a lubricating composition comprising an alginic acid or a salt or ester thereof, which is effective in reducing frictions in artificial joints and wear of artificial joint implants. Also provided is a method for lubricating artificial joints comprising administering said composition to a synovial cavity of a subject. In another aspect, the present invention provides use of an alginic acid or a salt or ester thereof in manufacturing a lubricating composition.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: August 1, 2017
    Assignee: National Taipei University of Technology
    Inventors: Hsu-Wei Fang, Shu-Wen Chen, Yi-Ling Huang
  • Publication number: 20150328252
    Abstract: The present invention provides a lubricating composition comprising an alginic acid or a salt or ester thereof, which is effective in reducing frictions in artificial joints and wear of artificial joint implants. Also provided is a method for lubricating artificial joints comprising administering said composition to a synovial cavity of a subject. In another aspect, the present invention provides use of an alginic acid or a salt or ester thereof in manufacturing a lubricating composition.
    Type: Application
    Filed: November 14, 2014
    Publication date: November 19, 2015
    Inventors: Hsu-Wei FANG, Shu-Wen CHEN, Yi-Ling HUANG
  • Patent number: 6371102
    Abstract: A device for cutting a row of interconnected rectangular plate-shaped workpieces into a plurality of individual rectangular units, includes a machine bed, and a sliding member disposed slidably on the machine bed and movable along a straight path. A rectangular work seat is disposed rotatably on the sliding member, and is rotatable about a vertical axis on the sliding member. The work seat has four sides, a length and a width. A mounting frame is disposed around the work seat, and defines a rectangular hole therein, which has four sides that are respectively parallel to the four sides of the work seat, and a length and a width that are respectively and slightly larger than those of the work seat. An adhesive sheet has an adhesive top surface with an outer peripheral portion that is adhered to a bottom surface of the mounting frame. The interconnected workpieces are adhered to the top surface of the adhesive sheet so as to be cut while disposed inside the mounting frame.
    Type: Grant
    Filed: August 30, 2000
    Date of Patent: April 16, 2002
    Assignee: Uni-Tek System, Inc.
    Inventors: Kuo-Hwa Wu, Chi-Chien Chien, Shu-Wen Chen, Wei-Chun Seng, Chun-Chen Chen
  • Patent number: D440145
    Type: Grant
    Filed: August 2, 2000
    Date of Patent: April 10, 2001
    Assignee: Uni-Tek System, Inc.
    Inventors: Kuo-Hwa Wu, Chi-Chien Chien, Shu-Wen Chen, Weichun Seng, Chun-Chen Chen