Patents by Inventor Shuze Zhao

Shuze Zhao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11018668
    Abstract: Modern FPGAs operate at a core voltage around 1V and therefore even small voltage fluctuations can lead to timing violations and logic errors. The Power Delivery Network (PDN) between a power supply and the FPGA core must be carefully designed to achieve a low output impedance over a broad range of frequencies. The present disclosure describes two techniques for characterization of the PDN: 1) to extract the DC resistance in the power delivery path, and 2) to identify the high impedance frequency band(s) in the PDN. An embedded impedance extraction tool is synthesized within the FPGA load, in coordination with a mixed-signal current-mode dc-dc converter. A self-calibrated Carry-Chain based ADC (CC-ADC) is used for high-speed sampling of the core voltage. By modifying the PDN based on the extracted results, the voltage operating range and reliability of a crossbar application may be greatly extended.
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: May 25, 2021
    Assignees: The Governing Council of the University of Toronto
    Inventors: Shuze Zhao, Olivier Trescases, Ibrahim Ahmed, Vaughn Betz
  • Patent number: 10615802
    Abstract: Methods and systems for operating a programmable logic fabric (16) including a dynamic parameter scaling controller (22) that tracks an operating parameter that functions at multiple operating conditions by maintaining the operating parameter while cycling through multiple operating conditions during a calibration mode using the calibration configuration for the programmable logic fabric (16). The dynamic parameter scaling controller (22) also stores one or more functional values for the operating parameter in a calibration table. The dynamic parameter scaling controller (22) also operates the programmable logic fabric (16) using a design configuration using dynamic values for the operating parameter based at least in part on the one or more operating conditions.
    Type: Grant
    Filed: February 10, 2017
    Date of Patent: April 7, 2020
    Assignee: THE GOVERNING COUNCIL OF THE UNIVERSITY OF TORONTO
    Inventors: Vaughan Betz, Shuze Zhao, Ibrahim Ahmed Ibrahim, Olivier Trescases
  • Publication number: 20190165782
    Abstract: Modern FPGAs operate at a core voltage around 1V and therefore even small voltage fluctuations can lead to timing violations and logic errors. The Power Delivery Network (PDN) between a power supply and the FPGA core must be carefully designed to achieve a low output impedance over a broad range of frequencies. The present disclosure describes two techniques for characterization of the PDN: 1) to extract the DC resistance in the power delivery path, and 2) to identify the high impedance frequency band(s) in the PDN. An embedded impedance extraction tool is synthesized within the FPGA load, in coordination with a mixed-signal current-mode dc-dc converter. A self-calibrated Carry-Chain based ADC (CC-ADC) is used for high-speed sampling of the core voltage. By modifying the PDN based on the extracted results, the voltage operating range and reliability of a crossbar application may be greatly extended.
    Type: Application
    Filed: November 14, 2018
    Publication date: May 30, 2019
    Inventors: Shuze ZHAO, Oliver TRESCASES, Ibrahim AHMED, Vaughn BETZ
  • Publication number: 20190115924
    Abstract: Methods and systems for operating a programmable logic fabric (16) including a dynamic parameter scaling controller (22) that tracks an operating parameter that functions at multiple operating conditions by maintaining the operating parameter while cycling through multiple operating conditions during a calibration mode using the calibration configuration for the programmable logic fabric (16). The dynamic parameter scaling controller (22) also stores one or more functional values for the operating parameter in a calibration table. The dynamic parameter scaling controller (22) also operates the programmable logic fabric (16) using a design configuration using dynamic values for the operating parameter based at least in part on the one or more operating conditions.
    Type: Application
    Filed: February 10, 2017
    Publication date: April 18, 2019
    Applicant: The Governing Council of the University of Toronto
    Inventors: Vaughan BETZ, Shuze ZHAO, Ibrahim Ahmed IBRAHIM, Olivier TRESCASES
  • Publication number: 20170272073
    Abstract: Methods and systems for operating a programmable logic fabric including a dynamic parameter scaling controller that tracks an operating parameter that functions at multiple operating conditions by maintaining the operating parameter while cycling through a multiple operating conditions during a calibration mode using the calibration configuration for the programmable logic fabric. The dynamic parameter scaling controller also stores one or more functional values for the operating parameter in a calibration table. The dynamic parameter scaling controller also operates the programmable logic fabric using a design configuration using dynamic values for the operating parameter based at least in part on the one or more operating conditions.
    Type: Application
    Filed: June 30, 2016
    Publication date: September 21, 2017
    Inventors: Vaughn Betz, Shuze Zhao, Ibrahim Ahmed Ibrahim, Olivier Trescases