Abstract: In a digital video communication system, a network clock source is provided to supply a common clock pulse synchronized with the transmission speed of the system to each station through a transmission channel to allow it to derive a video sync pulse. This sync pulse is applied to a video signal source to generate an analog composite television signal. A quantization sampling pulse is derived from the video sync pulse which is contained in the composite television signal to quantize the composite television signal. The quantized video signal is stored in a buffer and forwarded to a receiver station in response to the received network clock pulse, so that the quantization sampling rate and the transmission sampling rate of a transmitter station of the system are synchronized with each other. The sampling rate of the dequantization process at the receiver station is also synchronized with the transmission sampling rate.

Abstract: A television conference system includes, in a transmitting side, a plurality of TV cameras assigned with camera ID codes, and in a receiving side, a plurality of TV monitors assigned with monitor ID codes and frame memories for storing inputs to the TV monitors. In the transmitting side, a moving picture signal output from a TV camera selected by a camera ID number is encoded, and the encoded moving picture signal together with a monitor ID code of a TV monitor designated to display an output from the selected TV camera are transmitted to the receiving side. In the receiving side, writing is performed in a frame memory corresponding to the TV monitor designated by the monitor ID signal to display a moving picture on the TV monitor, writing in each of the frame memories corresponding to the other TV monitors is inhibited and the last frame of the latest moving picture displayed thereon is displayed as a still picture, and selection of the TV camera and designation of the TV monitor are arbitrarily performed.

Abstract: An inter-frame encoding/decoding equipment for television signals consists of inter-frame encoding equipment encoding a difference between television signals and the output of a frame memory and inter-frame decoding equipment which receives an encoded signal sent from the inter-frame encoding device via a transmission line, which decodes by adding the output of the frame memory to the encoded signal. The inter-frame encoding equipment is provided with a first operation circuit which operates the remainders obtained by dividing, by a predetermined value, the number of bits of logic "1" in the bit groups into which the output or the input of the frame memory is divided by a predetermined unit. The inter-frame decoding equipment is provided with a second operation circuit which operates the remainders obtained by dividing, by a predetermined value, the number of bits of logic "1" in the bit groups into which the output or the input of the frame memory is divided by a predetermined unit.

Abstract: A video signal frame memory is refreshed without requiring either a separate transmission line or the transmission of bursts of data. This is done by dividing the frame signals into blocks of data, which are further divided into lines and sub-blocks. During each frame, refreshing signals are sent on a sub-block basis, thereby distributing the refreshing control signals and preventing many signals from being sent in bursts.

Abstract: Inter-frame encoding/decoding equipment for television signals includes inter-frame encoding equipment generating an encoded signal by encoding a difference between television signals and the output of a frame memory and inter-frame decoding equipment which receives the encoded signal sent from the inter-frame encoding device via a transmission line. The decoding equipment decodes by adding its output of the frame memory to the encoded signal. The inter-frame encoding equipment is provided with a first operation circuit which calculates remainders obtained by dividing a predetermined value, into bit groups of the output or the input of the frame memory. The inter-frame decoding equipment is provided with a second operation circuit which calculates remainders obtained by dividing, the predetermined value, into the bit groups of the output or the input of its frame memory.

Abstract: There is provided a code converting circuit for converting digital signals of fixed length codes into variable length codes and delivering a train of variable length codes produced by the conversion parallelly every predetermined K bits.