Patents by Inventor Shy-Jay Lin

Shy-Jay Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220375993
    Abstract: A spin-orbit-torque (SOT) magnetic device includes a bottom metal layer, a first magnetic layer disposed over the bottom metal layer, a spacer layer disposed over the first magnetic layer, and a second magnetic layer disposed over the spacer layer. A diffusion barrier layer for suppressing metal elements of the first magnetic layer from diffusing into the bottom metal layer is disposed between the bottom metal layer and the first magnetic layer.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 24, 2022
    Inventors: Wilman TSAI, Shy-Jay LIN, Mingyuan SONG
  • Publication number: 20220367098
    Abstract: Memory stacks, memory devices and method of forming the same are provided. A memory stack includes a spin-orbit torque layer, a magnetic bias layer and a free layer. The magnetic bias layer is in physical contact with the spin-orbit torque layer and has a first magnetic anisotropy. The free layer is disposed adjacent to the spin-orbit torque layer and has a second magnetic anisotropy perpendicular to the first magnetic anisotropy.
    Type: Application
    Filed: July 29, 2022
    Publication date: November 17, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shy-Jay Lin, Wilman Tsai, Ming-Yuan Song
  • Publication number: 20220367566
    Abstract: A semiconductor device including a semiconductor substrate and an interconnect structure is provided. The semiconductor substrate includes a transistor, wherein the transistor has a source region and a drain region. The interconnect structure is disposed over the semiconductor substrate, wherein the interconnect structure includes a plurality of interlayer dielectric layers, a first via and a memory cell. The plurality of interlayer dielectric layers are over the semiconductor substrate. The first via is embedded in at least two interlayer dielectric layers among the plurality of interlayer dielectric layers and electrically connected with the drain region of the transistor. The memory cell is disposed over the at least two interlayer dielectric layers among the plurality of interlayer dielectric layers and electrically connected with the first via.
    Type: Application
    Filed: May 13, 2021
    Publication date: November 17, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Carlos H. Diaz, Shy-Jay Lin, Ming-Yuan Song
  • Patent number: 11502241
    Abstract: A magnetic memory device includes a magnetic tunnel junction (MTJ) stack, a spin-orbit torque (SOT) induction wiring disposed over the MTJ stack, a first terminal coupled to a first end of the SOT induction wiring, a second terminal coupled to a second end of the SOT induction wiring, and a selector layer coupled to the first terminal.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: November 15, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: MingYuan Song, Shy-Jay Lin, William J. Gallagher, Hiroki Noguchi
  • Publication number: 20220359816
    Abstract: In some embodiments, the present disclosure relates to a memory device that includes a spin orbit torque (SOT) layer arranged over a substrate. A magnetic tunnel junction (MTJ) structure may be arranged over the SOT layer. The MTJ structure includes a free layer, a reference layer, and a diffusion barrier layer disposed between the free layer and the reference layer. A first conductive wire is arranged below the SOT layer and coupled to the SOT layer. A second conductive wire is arranged below the SOT layer and coupled to the SOT layer. A third conductive wire is arranged over the MTJ structure. The memory device further includes a first selector structure arranged between the first conductive wire and the SOT layer.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 10, 2022
    Inventors: Ming Yuan Song, Shy-Jay Lin
  • Publication number: 20220359613
    Abstract: A method includes depositing a first dielectric layer over a semiconductor substrate, depositing a first electrode layer over the first dielectric layer, etching the first electrode layer to form a first electrode and a second electrode laterally separated from the first electrode, depositing a Spin Orbit Torque (SOT) material on the first electrode and the second electrode, depositing Magnetic Tunnel Junction (MTJ) layers on the SOT material, depositing a second electrode layer on the MTJ layers, etching the SOT material to form a SOT layer extending from the first electrode to the second electrode, etching the MTJ layers to form an MTJ stack on the SOT layer, and etching the second electrode layer to form a top electrode on the MTJ stack.
    Type: Application
    Filed: July 26, 2022
    Publication date: November 10, 2022
    Inventors: Shy-Jay Lin, MingYuan Song, Hiroki Noguchi
  • Publication number: 20220359614
    Abstract: The disclosure is directed to spin-orbit torque (“SOT”) magnetoresistive random-access memory (“MRAM”) (“SOT-MRAM”) structures and methods. A new structure of the SOT channel has one or more magnetic insertion layers superposed or stacked with one or more heavy metal layer(s). Through proximity to a magnetic insertion layer, a surface portion of a heavy metal layer is magnetized to include a magnetization. The magnetization within the heavy metal layer enhances spin-dependent scattering, which leads to increased transverse spin imbalance.
    Type: Application
    Filed: July 21, 2022
    Publication date: November 10, 2022
    Inventors: Shy-Jay Lin, Mingyuan Song
  • Publication number: 20220336728
    Abstract: A method of making an integrated circuit includes depositing a first ferromagnetic material over a substrate. The method includes applying a first magnetic field to the first ferromagnetic material. The method includes annealing the first ferromagnetic material while applying the first magnetic field to the first ferromagnetic material to set a magnetic field orientation in the first ferromagnetic material. The method includes depositing barrier material over the first ferromagnetic material. The method includes depositing a second ferromagnetic material over the barrier material. The method includes depositing an antiferromagnetic material over the second ferromagnetic material.
    Type: Application
    Filed: July 1, 2022
    Publication date: October 20, 2022
    Inventor: Shy-Jay LIN
  • Publication number: 20220328559
    Abstract: A method includes depositing a plurality of layers, which includes depositing a spin orbit coupling layer, depositing a dielectric layer over the spin orbit coupling layer, depositing a free layer over the dielectric layer, depositing a tunnel barrier layer over the free layer, and depositing a reference layer over the tunnel barrier layer. The method further includes performing a first patterning process to pattern the plurality of layers, and performing a second patterning process to pattern the reference layer, the tunnel barrier layer, the free layer, and the dielectric layer. The second patterning process stops on a top surface of the spin orbit coupling layer.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 13, 2022
    Inventors: Wilman Tsai, MingYuan Song, Shy-Jay Lin
  • Patent number: 11469267
    Abstract: A method includes depositing a plurality of layers, which includes depositing a spin orbit coupling layer, depositing a dielectric layer over the spin orbit coupling layer, depositing a free layer over the dielectric layer, depositing a tunnel barrier layer over the free layer, and depositing a reference layer over the tunnel barrier layer. The method further includes performing a first patterning process to pattern the plurality of layers, and performing a second patterning process to pattern the reference layer, the tunnel barrier layer, the free layer, and the dielectric layer. The second patterning process stops on a top surface of the spin orbit coupling layer.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: October 11, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wilman Tsai, MingYuan Song, Shy-Jay Lin
  • Patent number: 11469371
    Abstract: In some embodiments, the present disclosure relates to a memory device that includes a spin orbit torque (SOT) layer arranged over a substrate. A magnetic tunnel junction (MTJ) structure may be arranged over the SOT layer. The MTJ structure includes a free layer, a reference layer, and a diffusion barrier layer disposed between the free layer and the reference layer. A first conductive wire is arranged below the SOT layer and coupled to the SOT layer. A second conductive wire is arranged below the SOT layer and coupled to the SOT layer. A third conductive wire is arranged over the MTJ structure. The memory device further includes a first selector structure arranged between the first conductive wire and the SOT layer.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: October 11, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming Yuan Song, Shy-Jay Lin
  • Patent number: 11456100
    Abstract: Memory stacks, memory devices and method of forming the same are provided. A memory stack includes a spin-orbit torque layer, a magnetic bias layer and a free layer. The magnetic bias layer is in physical contact with the spin-orbit torque layer and has a first magnetic anisotropy. The free layer is disposed adjacent to the spin-orbit torque layer and has a second magnetic anisotropy perpendicular to the first magnetic anisotropy.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: September 27, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Shy-Jay Lin, Wilman Tsai, Ming-Yuan Song
  • Patent number: 11437434
    Abstract: A spin-orbit-torque (SOT) magnetic device includes a bottom metal layer, a first magnetic layer disposed over the bottom metal layer, a spacer layer disposed over the first magnetic layer, and a second magnetic layer disposed over the spacer layer. A diffusion barrier layer for suppressing metal elements of the first magnetic layer from diffusing into the bottom metal layer is disposed between the bottom metal layer and the first magnetic layer.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: September 6, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wilman Tsai, Shy-Jay Lin, Mingyuan Song
  • Patent number: 11430832
    Abstract: A method includes depositing a first dielectric layer over a semiconductor substrate, depositing a first electrode layer over the first dielectric layer, etching the first electrode layer to form a first electrode and a second electrode laterally separated from the first electrode, depositing a Spin Orbit Torque (SOT) material on the first electrode and the second electrode, depositing Magnetic Tunnel Junction (MTJ) layers on the SOT material, depositing a second electrode layer on the MTJ layers, etching the SOT material to form a SOT layer extending from the first electrode to the second electrode, etching the MTJ layers to form an MTJ stack on the SOT layer, and etching the second electrode layer to form a top electrode on the MTJ stack.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: August 30, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shy-Jay Lin, MingYuan Song, Hiroki Noguchi
  • Publication number: 20220246189
    Abstract: A memory device and a memory circuit is provided. The memory device includes a spin-orbit torque (SOT) layer, a magnetic tunnel junction (MTJ), a read word line, a selector and a write word line. The MTJ stands on the SOT layer. The read word line is electrically connected to the MTJ. The write word line is connected to the SOT layer through the selector. The write word line is electrically connected to the SOT layer when the selector is turned on, and the write word line is electrically isolated from the SOT layer when the selector is in an off state.
    Type: Application
    Filed: April 21, 2022
    Publication date: August 4, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Li Chiang, Chung-Te Lin, Shy-Jay Lin, Tzu-Chiang Chen, Ming-Yuan Song, Hon-Sum Philip Wong
  • Publication number: 20220223785
    Abstract: Semiconductor device includes pair of active devices, composite spin Hall electrode, and a magnetic tunnel junction. Composite spin Hall electrode is electrically connected to pair of active devices. Magnetic tunnel junction is disposed on opposite side of composite spin hall electrode with respect to pair of active devices. Spin Hall electrode includes pair of heavy metal layers, and spacer layer disposed in between pair of heavy metal layers. Pair of heavy metal layers is made of a heavy metal in a metastable state. Spacer layer comprises first material different from the pair of heavy metal layers.
    Type: Application
    Filed: July 7, 2021
    Publication date: July 14, 2022
    Inventors: Chien-Min Lee, Shy-Jay Lin, Yen-Lin Huang, MingYuan Song, Tung Ying Lee
  • Publication number: 20220208244
    Abstract: A magnetic memory device includes a magnetic tunnel junction (MTJ) stack, a spin-orbit torque (SOT) induction wiring disposed over the MTJ stack, a first terminal coupled to a first end of the SOT induction wiring, a second terminal coupled to a second end of the SOT induction wiring, and a shared selector layer coupled to the first terminal.
    Type: Application
    Filed: March 16, 2022
    Publication date: June 30, 2022
    Inventors: MingYuan Song, Shy-Jay Lin, Chien-Min Lee, William Joseph Gallagher
  • Patent number: 11362268
    Abstract: A semiconductor structure is provided. The semiconductor structure includes: a substrate; a magnetic layer over the substrate; a magnetic tunnel junction (MTJ) cell over the magnetic layer; and a non-magnetic conductive layer between the magnetic layer and the MTJ cell. An associated method for fabricating the semiconductor structure is also disclosed.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: June 14, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chwen Yu, Shy-Jay Lin
  • Publication number: 20220165320
    Abstract: A memory device and a memory circuit is provided. The memory device includes a spin-orbit torque (SOT) layer, a magnetic tunnel junction (MTJ), a read word line, a selector and a write word line. The MTJ stands on the SOT layer. The read word line is electrically connected to the MTJ. The write word line is connected to the SOT layer through the selector. The write word line is electrically connected to the SOT layer when the selector is turned on, and the write word line is electrically isolated from the SOT layer when the selector is in an off state.
    Type: Application
    Filed: November 24, 2020
    Publication date: May 26, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Li Chiang, Chung-Te Lin, Shy-Jay Lin, Tzu-Chiang Chen, Ming-Yuan Song, Hon-Sum Philip Wong
  • Patent number: 11342015
    Abstract: A memory device and a memory circuit is provided. The memory device includes a spin-orbit torque (SOT) layer, a magnetic tunnel junction (MTJ), a read word line, a selector and a write word line. The MTJ stands on the SOT layer. The read word line is electrically connected to the MTJ. The write word line is connected to the SOT layer through the selector. The write word line is electrically connected to the SOT layer when the selector is turned on, and the write word line is electrically isolated from the SOT layer when the selector is in an off state.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: May 24, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Li Chiang, Chung-Te Lin, Shy-Jay Lin, Tzu-Chiang Chen, Ming-Yuan Song, Hon-Sum Philip Wong