Patents by Inventor Shyam Somayajula

Shyam Somayajula has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250192657
    Abstract: A power stage of a voltage regulator includes a high-side switch, a low-side switch, a gate-driver, a power management block, a bootstrap capacitor and a refresh block. The power management block is designed to receive a power-control signal, and to cause both of the high-side switch and low-side switch to be switched OFF when said power-control signal is in a first state. The bootstrap capacitor is provided to enable said high-side switch to be switched ON. The cross-terminal voltage across the bootstrap capacitor is required to be above a first threshold voltage for reliable operation of the high-side switch. The refresh block is designed to refresh the bootstrap capacitor to maintain the cross-terminal voltage above the first threshold voltage while both the high-side switch and low-side switch continue to be in the OFF state when the power-control signal is in the first state.
    Type: Application
    Filed: October 22, 2024
    Publication date: June 12, 2025
    Inventors: Arnold J D'Souza, Shyam Somayajula, Yunsong Wang, Yiren Wang
  • Publication number: 20250175080
    Abstract: A power stage of a switching converter contains a high-side switch and a low-side switch respectively operated by corresponding drive signals. A current-sense block generates a sensed-current signal which is blanked for a first duration upon start of a longer phase of a high-side phase and a low-side phase. The sensed-current signal is un-blanked upon end of the first duration. The current-sense block generates a first pulse starting synchronous with the start of the longer phase and with pulse-width equaling the first duration. A gate driver receives the first pulse and generates a delayed pulse starting synchronous with the start of the longer phase and with pulse-width equaling a sum of the first duration and a second duration. The gate driver generates drive signal (for the switch being driven with the longer phase) with a first logic level for a duration of at least the pulse-width of the delayed pulse.
    Type: Application
    Filed: October 9, 2024
    Publication date: May 29, 2025
    Inventors: Arnold J D'Souza, Shyam Somayajula
  • Publication number: 20250167683
    Abstract: A multi-phase switching converter includes a power stage and a phase controller. The power stage is designed to record parameters representing internal health information in the form of a set of bits. The phase controller is designed to control the power stage as well as other power stages to cause the power stages to together generate a regulated power supply. The phase controller drives a first signal to a first state and then a second state to cause the power stage to be in an active state and an inactive state respectively. The power stage transmits the set of bits to the phase controller serially on a first path after the first signal is driven to the first state. In an embodiment, the power stage inserts a bit-boundary indicating logic/voltage level between successive pairs of transmitted bits in the set to signal boundaries between the bits.
    Type: Application
    Filed: April 10, 2024
    Publication date: May 22, 2025
    Inventors: Arnold J. D'Souza, Shyam Somayajula
  • Publication number: 20250158525
    Abstract: A power stage of a multi-phase switching converter contains a high-side switch and a low-side switch to respectively drive an inductor in a first interval and a second interval periodically based on a control signal. The inductor is connected to a junction of the high-side switch and the low-side switch. The power stage contains a current-sense block to generate information representing a magnitude of inductor-current flowing through the inductor on an output node of the power stage. The power stage contains a switch connected between the output node and an output pin of the power stage. When the power stage is inactive, a portion of the current-sense block driving the output node is maintained in a powered-ON state, and the switch is operated to be open to disconnect the output node from the output pin. In an embodiment, the portion is an amplifier.
    Type: Application
    Filed: March 28, 2024
    Publication date: May 15, 2025
    Inventors: Arnold J. D'Souza, Shyam Somayajula
  • Publication number: 20250158528
    Abstract: A power stage of multi-phase switching converter includes a pair of power switches, a temperature sensor, a comparator and a current-sense block. The power switches are operated to be on or off by a phase controller of the converter to drive an inductor-current through an inductor. The temperature sensor generates a temperature signal indicative of the temperature of the power stage. The temperature signal is coupled to be indicated on a common path which indicates to the phase controller a first temperature derived from all of the temperature signals from all the operating power stages of the converter. A comparator compares magnitudes of the temperature signal and the first temperature. If the result indicates that the magnitudes are unequal, the current-sense block reports, to the phase controller, a first magnitude in variance with an actual magnitude of the inductor-current to cause the temperature to tend towards the first temperature.
    Type: Application
    Filed: October 16, 2024
    Publication date: May 15, 2025
    Inventors: Pedro Filipe Francisco Marques, Michael Figueiredo, Yunsong Wang, Arnold J D'Souza, Shyam Somayajula
  • Publication number: 20250158526
    Abstract: A switching converter includes a power stage and a controller. The power stage drives a current through an inductance in a duration specified by a control signal. The phase controller generates the control signal to cause the power stage to generate a regulated supply voltage. The power stage is designed to communicate with the phase controller on a path. The power stage includes a first sub-stage and a second sub-stage that respectively drive a first sub-current and a second sub-current via corresponding inductors in response to the control signal. The corresponding inductors together operate to provide the inductance. The path is used for communication between the first sub-stage and the phase controller, and then between the second sub-stage and the phase controller in alternate cycles of the control signal.
    Type: Application
    Filed: June 17, 2024
    Publication date: May 15, 2025
    Inventors: Arnold J D'Souza, Shyam Somayajula
  • Patent number: 12183408
    Abstract: Operating a memory unit using a low-power DC source. The low-power DC source provides lesser power than that required to operate the memory unit. In an embodiment, charge from the low-power source is stored on a charge storage device in a first time interval. The memory unit is operated using the charge storage device as a second power source in a second time interval. A portion of one of the first time interval and the second time interval does not overlap with the other one of the first time interval and the second time interval.
    Type: Grant
    Filed: December 11, 2021
    Date of Patent: December 31, 2024
    Assignee: Ningbo Aura Semiconductor Co., Ltd.
    Inventors: Arnold J D'Souza, Shyam Somayajula
  • Patent number: 12176808
    Abstract: A high-side switch and a low-side switch respectively drive the inductor in a first phase and a second phase periodically. The inductor current during a longer phase of the first phase and the second phase is measured as a first portion. Peak of the inductor current at a transition from the shorter phase to the longer phase is estimated. The estimating includes comparing an estimated magnitude with a first magnitude of the inductor current at the transition in a first period, and changing the estimated magnitude. The comparing and changing are repeated until the estimated magnitude equals the first magnitude to identify the peak. A second portion of the inductor current during the shorter phase is generated based on the estimated magnitude. The first and second portions are provided as an emulated current of the inductor current.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: December 24, 2024
    Assignee: Shaoxing Yuanfang Semiconductor Co., Ltd.
    Inventors: Arnold J D'Souza, Shyam Somayajula
  • Patent number: 12093113
    Abstract: The present disclosure is directed to a power supply to drive a consumer component, which is operable in any one of multiple power states in a specified duration. The power supply contains a phase controller and power stage, to together drive the consumer component to a desired power state in a corresponding duration. According to an aspect, the phase controller includes a pin, an impedance network and an internal controller. The impedance network is configurable by the internal controller to provide a first impedance at the pin when the desired power state is a first power state and a second impedance when the desired power state is a second power state. Accordingly, the power stage may source an electrical signal to the pin and sense the response to determine whether the desired power state is the first or the second power state.
    Type: Grant
    Filed: January 30, 2023
    Date of Patent: September 17, 2024
    Assignee: Shaoxing Yuanfang Semiconductor Co., Ltd.
    Inventors: Arnold J D'Souza, Shyam Somayajula
  • Patent number: 12045073
    Abstract: A linear voltage regulator includes a pass transistor, an error amplifier, a buffer, a load capacitor and a pair of components coupled in series between the output node of the error amplifier and the regulated output voltage node. The buffer is coupled between the error amplifier and the pass transistor. The buffer is a unity voltage-gain buffer, has a wide bandwidth and provides higher current drive to the control terminal of the pass transistor. A first component of the pair of components is provided to decrease loop gain as output current increases so as to provide frequency compensation, but reduces a speed at which the regulator can respond to output voltage transients. A second component of the pair of components is designed to at least partially negate the operation of the first component during an output voltage transient, and thereby enables the regulator to respond quickly to the transient.
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: July 23, 2024
    Assignee: Ningbo Aura Semiconductor Co., Limited
    Inventors: Arnold J D'Souza, Shyam Somayajula
  • Publication number: 20240125825
    Abstract: Faults in the secondary-loop of a trans-inductor voltage regulator (TLVR) are detected. Each power stage of the TLVR is connected to a primary winding of a respective transformer in the TLVR. The secondary windings of the transformers and a compensation inductor form a secondary-loop. A phase controller in the TLVR operates to both drive a first power stage to an ON state and to place a second power stage in an OFF state in a first duration. In the first duration, if the first power stage draws a current less than a maximum threshold and if a voltage at the switching node of the second power stage is negative, the phase controller determines that no faults exist in the series secondary circuit. Otherwise, the phase controller determines that one or more faults exist in the series secondary circuit.
    Type: Application
    Filed: October 9, 2023
    Publication date: April 18, 2024
    Inventors: Arnold J D'Souza, Shyam Somayajula
  • Publication number: 20240128870
    Abstract: In a switching converter employing a high-side switch and a low-side switch that are alternately ON in a first phase and a second phase of a switching cycle respectively, inductor-current flowing through the high-side switch is sensed with a first scaling factor to obtain a scaled high-side current. Inductor-current flowing through the low-side switch is sensed with a second scaling factor in the second phase to obtain a scaled low-side current. Both of the scaled high-side current and the scaled low-side current are examined for any discontinuity during transition from the high-side phase to the low-side phase. In case of discontinuity, one or both of the first factor and the second factor is/are adjusted to reduce the magnitude of the discontinuity between the scaled high-side current and the scaled low-side current during transition from the first phase to the second phase. An accurate scaled copy of the inductor-current is obtained.
    Type: Application
    Filed: August 2, 2023
    Publication date: April 18, 2024
    Inventors: Arnold J D'Souza, Shyam Somayajula
  • Publication number: 20240128873
    Abstract: A switching converter includes high-side switch, a low-side switch, a first transistor, a second transistor, and a pull-up element. A series arrangement of the first transistor and the second transistor is coupled between a first terminal of the pull-up element and a first constant reference potential. A second terminal of the pull-up element is coupled to a second constant reference potential. A control terminal of the first transistor is coupled to a junction of the high-side switch and the low-side switch. A control terminal of the second transistor is coupled to the control terminal of the low-side switch. A voltage at a junction of the pull-up element and the series arrangement represents a binary-level overlap indicator that indicates whether an ON-duration of the high-side switch overlaps with an ON-duration of the low-side switch. A control loop in the switching converter dynamically adjusts the falling dead-time based on the overlap indicator.
    Type: Application
    Filed: May 3, 2023
    Publication date: April 18, 2024
    Inventors: Arnold J D'Souza, Shyam Somayajula
  • Publication number: 20240128977
    Abstract: Aspects of the present disclosure provide level-shifters and their use with switching converters. A level-shifter receives a binary signal on an input node and generates an output signal also representing the same logic level of the binary signal. The output signal represents logic levels in a first voltage range defined with respect to a first constant reference potential in a sequence of first phases of a clock signal and in a second voltage range defined with respect to a second constant reference potential in a sequence of second phases of the clock signal. The first constant reference potential is lower than the second constant reference potential. A controller block contained in the level-shifter receives the binary signal and transfers a changed logic level of the binary signal only in the first phase, but not in the second phase of the clock signal.
    Type: Application
    Filed: January 30, 2023
    Publication date: April 18, 2024
    Inventors: Arnold J D'Souza, Shyam Somayajula
  • Publication number: 20240128852
    Abstract: A high-side gate driver driving a high-side switch of a switching converter determines a first transition between a first sub-duration and a second sub-duration as being when a voltage at the switching node (of the high-side switch) becomes less than a voltage at the power terminal by a first threshold voltage. The gate driver determines a second transition between the second sub-duration and a third sub-duration as being when a voltage of the control signal crosses a threshold voltage of the high-side switch. In an embodiment, the second sub-duration corresponds to Miller Plateau.
    Type: Application
    Filed: October 11, 2023
    Publication date: April 18, 2024
    Inventors: Arnold J. D'Souza, Shyam Somayajula
  • Publication number: 20240128856
    Abstract: A power stage of a voltage regulator includes a high-side switch and a low-side switch connected in series. The high-side switch and the low-side switch are operated to be ON and OFF to generate an output voltage at an output node of the power stage. The output voltage is derived from an input voltage received at an input node of the power stage. The power stage includes a bootstrap capacitor to provide gate drive the high-side switch. The power stage contains a fault-detector for detecting an open condition of the bootstrap capacitor as well as a short condition of the bootstrap capacitor.
    Type: Application
    Filed: July 28, 2023
    Publication date: April 18, 2024
    Inventors: Arnold J D'Souza, Shyam Somayajula
  • Publication number: 20240128854
    Abstract: A switching converter provides an output voltage, and includes a first switch, a gate driver and an over-current management block. The gate driver is operable to drive the first switch with an ON duration of a first magnitude normally to provide the output voltage. The ON duration corresponds to a first phase of each cycle of a sequence of cycles of a periodic clock signal employed in the switching converter. The over-current management block is operable to determine a potential over-current condition when the switch operates with an ON duration of a first magnitude. In response to the determination, the over-current management block is operable to cause the gate driver to increase an ON duration of the first switch to a second magnitude, and examine a magnitude of current through the first switch with ON duration of the second magnitude to determine whether actual over-current condition is present.
    Type: Application
    Filed: February 15, 2023
    Publication date: April 18, 2024
    Inventors: Arnold J. D'Souza, Shyam Somayajula
  • Patent number: 11953925
    Abstract: A linear voltage regulator includes a first driver stage coupled between the error amplifier and the pass transistor of the regulator. A first transistor of the first driver stage has a gate terminal connected to receive the error signal from the error amplifier. A gate terminal of the pass transistor is coupled to receive an output of the first driver stage. The linear voltage regulator includes a compensation circuit for frequency compensation, and a compensation adjustment circuit. The compensation adjustment circuit in the regulator senses a magnitude of the current through the first transistor of the first driver stage, and adjusts a parameter of the compensation circuit based on the magnitude of the sensed current. Sensing the current at the first driver stage provides an indication of the load current drawn from the regulator, and is used for controlling the location of a compensating zero introduced by the compensation circuit.
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: April 9, 2024
    Assignee: Ningbo Aura Semiconductor Co., Limited
    Inventors: Arnold J D'Souza, Shyam Somayajula
  • Publication number: 20240028104
    Abstract: The present disclosure is directed to a power supply to drive a consumer component, which is operable in any one of multiple power states in a specified duration. The power supply contains a phase controller and power stage, to together drive the consumer component to a desired power state in a corresponding duration. According to an aspect, the phase controller includes a pin, an impedance network and an internal controller. The impedance network is configurable by the internal controller to provide a first impedance at the pin when the desired power state is a first power state and a second impedance when the desired power state is a second power state. Accordingly, the power stage may source an electrical signal to the pin and sense the response to determine whether the desired power state is the first or the second power state.
    Type: Application
    Filed: January 30, 2023
    Publication date: January 25, 2024
    Inventors: Arnold J. D'Souza, Shyam Somayajula
  • Publication number: 20240030811
    Abstract: A high-side switch and a low-side switch respectively drive the inductor in a first phase and a second phase periodically. The inductor current during a longer phase of the first phase and the second phase is measured as a first portion. Peak of the inductor current at a transition from the shorter phase to the longer phase is estimated. The estimating includes comparing an estimated magnitude with a first magnitude of the inductor current at the transition in a first period, and changing the estimated magnitude. The comparing and changing are repeated until the estimated magnitude equals the first magnitude to identify the peak. A second portion of the inductor current during the shorter phase is generated based on the estimated magnitude. The first and second portions are provided as an emulated current of the inductor current.
    Type: Application
    Filed: November 16, 2022
    Publication date: January 25, 2024
    Inventors: Arnold J. D'Souza, Shyam Somayajula