Patents by Inventor Shyam Sridhar

Shyam Sridhar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230411116
    Abstract: A plasma processing method includes generating a plasma within a processing chamber using source power to ignite a glow phase of the plasma, generating low-energy ions at a substrate supported by a substrate holder in the processing chamber from the plasma using lower-frequency radio frequency bias power applied during the glow phase, and generating high-energy ions at the substrate using higher-frequency radio frequency bias power applied during an afterglow phase of the plasma. The frequency of the higher-frequency radio frequency bias power is greater than the frequency of the lower-frequency radio frequency bias power.
    Type: Application
    Filed: June 15, 2022
    Publication date: December 21, 2023
    Inventors: Ya-Ming Chen, Shyam Sridhar, Peter Lowwell George Ventzek, Alok Ranjan
  • Publication number: 20230377849
    Abstract: A method of processing a substrate that includes: loading the substrate in a plasma processing chamber, the substrate including an underlying layer; maintaining a steady state flow of a process gas into the plasma processing chamber in the plasma processing chamber; generating a plasma in the plasma processing chamber; exposing the substrate to the plasma to etch the underlying layer; and pulsing a first additional gas, using a first effusive gas injector, towards a first region of the substrate to disrupt the steady state flow of the process gas over the first region, the pulsing locally changing a composition of the plasma near the first region.
    Type: Application
    Filed: June 15, 2022
    Publication date: November 23, 2023
    Inventors: Shyam Sridhar, Ya-Ming Chen, Peter Lowell George Ventzek, Mitsunori Ohata, Alok Ranjan
  • Publication number: 20230377895
    Abstract: In certain embodiments, a method includes positioning a substrate on a substrate holder in a processing chamber and etching the substrate by cyclically performing a periodic plasma process that includes multiple multiphase pulse cycles that each includes elevated etching, etching-and-deposition, and elevated deposition phases. The elevated deposition phase includes applying a source power (SP) to the chamber at a first SP level. The etching-and-deposition phase includes applying the SP to the chamber at a second SP level and applying a lower-frequency radio frequency (RF) bias power (LBP) to the chamber at an LBP level. The elevated deposition phase includes applying the SP to the chamber at a third SP level and applying a higher-frequency RF bias power (HBP) to the chamber at an HBP level, the third SP level being less than the first SP level. A same gas combination is supplied to the processing chamber during each cycle.
    Type: Application
    Filed: June 16, 2022
    Publication date: November 23, 2023
    Inventors: Ya-Ming Chen, Shyam Sridhar, Peter Lowell George Ventzek, Alok Ranjan
  • Publication number: 20230377853
    Abstract: A plasma etching system for a substrate including: a plasma processing chamber; a substrate holder disposed in the plasma processing chamber; a RF power source configured to generate a plasma in the plasma processing chamber; a set of electromagnets configured to apply a magnetic field in the processing chamber, the magnetic field of the set of the electromagnets being independent from a magnetic field generated by the RF power source; and a microprocessor coupled to the RF power source and the set of electromagnets, the microprocessor including a non-volatile memory having a program including instructions to: power the RF power source and generate the plasma in the processing chamber to etch the substrate; and provide a power pulse train to the set of electromagnets and generate the magnetic field that is pulsed, in the plasma processing chamber.
    Type: Application
    Filed: June 16, 2022
    Publication date: November 23, 2023
    Inventors: Ya-Ming Chen, Shyam Sridhar, Peter Lowell George Ventzek, Alok Ranjan, Mitsunori Ohata
  • Patent number: 11637242
    Abstract: The performance of a ReRAM structure may be stabilized by utilizing a dry chemical gas removal (or cleaning) process to remove sidewall residue and/or etch by-products after etching the ReRAM stack layers. The dry chemical gas removal process decreases undesirable changes in the ReRAM forming voltage that may result from such sidewall residue and/or etch by-products. Specifically, the dry chemical gas removal process may reduce the ReRAM forming voltage that may otherwise result in a ReRAM structure that has the sidewall residue and/or etch by-products. In one embodiment, the dry chemical gas removal process may comprise utilizing a combination of HF and NH3 gases. The dry chemical gas removal process utilizing HF and NH3 gases may be particularly suited for removing halogen containing sidewall residue and/or etch by-products.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: April 25, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Sergey Voronin, Qi Wang, Shyam Sridhar, Karsten Beckmann, Martin Rodgers, Nathaniel Cady
  • Patent number: 11398386
    Abstract: In one example, a method of processing a substrate includes receiving a substrate in a processing chamber, the substrate having an etch mask positioned over an underlying layer to be etched, where the underlying layer is a silicon-containing layer. The method includes executing a first etch process that includes forming a first plasma from a first process gas that includes hydrogen bromide or chlorine and etching the underlying layer using products of the first plasma. The method includes executing a second etch process that includes forming a second plasma from a second process gas that includes fluorine and etching the substrate using products from the second plasma. The method may include alternating between the first etch process and the second etch process.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: July 26, 2022
    Assignee: Tokyo Electron Limited
    Inventors: Yusuke Yoshida, Sergey Voronin, Shyam Sridhar, Caitlin Philippi, Christopher Talone, Alok Ranjan
  • Publication number: 20220059765
    Abstract: The performance of a ReRAM structure may be stabilized by utilizing a dry chemical gas removal (or cleaning) process to remove sidewall residue and/or etch by-products after etching the ReRAM stack layers. The dry chemical gas removal process decreases undesirable changes in the ReRAM forming voltage that may result from such sidewall residue and/or etch by-products. Specifically, the dry chemical gas removal process may reduce the ReRAM forming voltage that may otherwise result in a ReRAM structure that has the sidewall residue and/or etch by-products. In one embodiment, the dry chemical gas removal process may comprise utilizing a combination of HF and NH3 gases. The dry chemical gas removal process utilizing HF and NH3 gases may be particularly suited for removing halogen containing sidewall residue and/or etch by-products.
    Type: Application
    Filed: August 21, 2020
    Publication date: February 24, 2022
    Inventors: Sergey Voronin, Qi Wang, Shyam Sridhar, Karsten Beckmann, Martin Rodgers, Nathaniel Cady
  • Patent number: 10811269
    Abstract: Sidewall etching of substrate features may be achieved by employing an etch stop layer formed over the features. The etch stop layer is thinner on sidewalls of the features as compared to the bottom of the features. The lateral etching of the features is achieved by use of an over etch which breaks through the etch stop layer on the sidewalls of the features but does not break through the etch stop layer formed at the bottom of the features. The use of the etch stop layer allows for lateral etching while preventing unwanted vertical etching. The lateral etching may be desirable for use in a number of structures, including but not limited to 3D structures. The lateral etching may also be used to provide vertical sidewalls by reducing the sidewall taper angle.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: October 20, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Shyam Sridhar, Nayoung Bae, Sergey Voronin, Alok Ranjan
  • Publication number: 20200273992
    Abstract: Residue at the base of a feature in a substrate to be etched is limited so that improved profiles may be obtained when forming vertical, narrow pitch, high aspect ratio features, for example fin field effect transistor (FinFET) gates. A thin bottom layer of the feature is formed of a different material than the main layer of the feature. The bottom material may be comprised of a material that preferentially etches and/or preferentially oxidizes as compared to the main layer. The bottom layer may comprise silicon germanium. The preferential etching characteristics may provide a process in which un-etched residuals do not remain. Even if residuals remain, after etch of the feature, an oxidation process may be performed. Enhanced oxidation rates of the bottom material allow any remaining residual to be oxidized. Plasma oxidation may be used. The oxidized material may then be removed by utilizing standard oxide removal mechanisms.
    Type: Application
    Filed: February 5, 2020
    Publication date: August 27, 2020
    Inventors: Sergey Voronin, Christopher Catano, Sang Cheol Han, Shyam Sridhar, Yusuke Yoshida, Christopher Talone, Alok Ranjan
  • Publication number: 20200273711
    Abstract: In one example, a method of processing a substrate includes receiving a substrate in a processing chamber, the substrate having an etch mask positioned over an underlying layer to be etched, where the underlying layer is a silicon-containing layer. The method includes executing a first etch process that includes forming a first plasma from a first process gas that includes hydrogen bromide or chlorine and etching the underlying layer using products of the first plasma. The method includes executing a second etch process that includes forming a second plasma from a second process gas that includes fluorine and etching the substrate using products from the second plasma. The method may include alternating between the first etch process and the second etch process.
    Type: Application
    Filed: February 18, 2020
    Publication date: August 27, 2020
    Inventors: Yusuke Yoshida, Sergey Voronin, Shyam Sridhar, Caitlin Philippi, Christopher Talone, Alok Ranjan
  • Patent number: 10529589
    Abstract: A method of etching is described. The method providing a substrate having a first material composed of silicon-containing organic material and a second material that is different from the first material, forming a chemical mixture by plasma-excitation of a process gas containing SF6 and an optional inert gas, controlling a processing pressure at or above 100 mtorr, and exposing the first material on the substrate to the chemical mixture to selectively etch the first material relative to the second material.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: January 7, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Erdinc Karakas, Li Wang, Andrew Nolan, Christopher Talone, Shyam Sridhar, Alok Ranjan, Hiroto Ohtake
  • Publication number: 20190259623
    Abstract: Sidewall etching of substrate features may be achieved by employing an etch stop layer formed over the features. The etch stop layer is thinner on sidewalls of the features as compared to the bottom of the features. The lateral etching of the features is achieved by use of an over etch which breaks through the etch stop layer on the sidewalls of the features but does not break through the etch stop layer formed at the bottom of the features. The use of the etch stop layer allows for lateral etching while preventing unwanted vertical etching. The lateral etching may be desirable for use in a number of structures, including but not limited to 3D structures. The lateral etching may also be used to provide vertical sidewalls by reducing the sidewall taper angle.
    Type: Application
    Filed: February 15, 2019
    Publication date: August 22, 2019
    Inventors: Shyam Sridhar, Nayoung Bae, Sergey Voronin, Alok Ranjan
  • Publication number: 20180358233
    Abstract: A method of etching is described. The method providing a substrate having a first material composed of silicon-containing organic material and a second material that is different from the first material, forming a chemical mixture by plasma-excitation of a process gas containing SF6 and an optional inert gas, controlling a processing pressure at or above 100 mtorr, and exposing the first material on the substrate to the chemical mixture to selectively etch the first material relative to the second material.
    Type: Application
    Filed: June 1, 2018
    Publication date: December 13, 2018
    Inventors: Erdinc Karakas, Li Wang, Andrew Nolan, Christopher Talone, Shyam Sridhar, Alok Ranjan, Hiroto Ohtake
  • Patent number: 10115591
    Abstract: Methods and systems for selective silicon anti-reflective coating (SiARC) removal are described. An embodiment of a method includes providing a substrate in a process chamber, the substrate comprising: a resist layer, a SiARC layer, a pattern transfer layer, and an underlying layer. Such a method may also include performing a pattern transfer process configured to remove the resist layer and create a structure on the substrate, the structure comprising portions of the SiARC layer and the pattern transfer layer. The method may additionally include performing a modification process on the SiARC layer of the structure, the modification converting the SiARC layer into a porous SiARC layer. Further, the method may include performing a removal process of the porous SiARC layer of the structure, wherein the modification and removal processes of the SiARC layer are configured to meet target integration objectives.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: October 30, 2018
    Assignee: Tokyo Electron Limited
    Inventors: Shyam Sridhar, Li Wang, Andrew Nolan, Hiroto Ohtake, Sergey Voronin, Alok Ranjan
  • Publication number: 20180197730
    Abstract: Methods and systems for selective silicon anti-reflective coating (SiARC) removal are described. An embodiment of a method includes providing a substrate in a process chamber, the substrate comprising: a resist layer, a SiARC layer, a pattern transfer layer, and an underlying layer. Such a method may also include performing a pattern transfer process configured to remove the resist layer and create a structure on the substrate, the structure comprising portions of the SiARC layer and the pattern transfer layer. The method may additionally include performing a modification process on the SiARC layer of the structure, the modification converting the SiARC layer into a porous SiARC layer. Further, the method may include performing a removal process of the porous SiARC layer of the structure, wherein the modification and removal processes of the SiARC layer are configured to meet target integration objectives.
    Type: Application
    Filed: February 23, 2017
    Publication date: July 12, 2018
    Inventors: Shyam Sridhar, Li Wang, Andrew Nolan, Hiroto Ohtake, Sergey Voronin, Alok Ranjan