Patents by Inventor Shyh-Hsing Wang

Shyh-Hsing Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11748282
    Abstract: An electronic device includes a core circuit and a detecting circuit. The core circuit receives a first clock signal and a second clock signal that are different. The core circuit generates a first working state and a second working state respectively according to the first clock signal and the second clock signal. The detecting circuit detects a relationship between the first working state and the second working state to generate a reset signal. The reset signal is configured to reset the relationship between the first working state and the second working state to an initial corresponding relationship, and reduce an influence of electromagnetic interference on the electronic device.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: September 5, 2023
    Assignee: ALi Corporation
    Inventor: Shyh-Hsing Wang
  • Publication number: 20220197839
    Abstract: An electronic device includes a core circuit and a detecting circuit. The core circuit receives a first clock signal and a second clock signal that are different. The core circuit generates a first working state and a second working state respectively according to the first clock signal and the second clock signal. The detecting circuit detects a relationship between the first working state and the second working state to generate a reset signal. The reset signal is configured to reset the relationship between the first working state and the second working state to an initial corresponding relationship, and reduce an influence of electromagnetic interference on the electronic device.
    Type: Application
    Filed: December 6, 2021
    Publication date: June 23, 2022
    Applicant: ALi Corporation
    Inventor: Shyh-Hsing Wang
  • Publication number: 20050122546
    Abstract: An image processing mechanism combines the halftone method and image enhancement technique for processing halftone and improving image performance. The mechanism includes an image input module, an image enhancement module and a halftone module. The image input module sends the original image data to the image enhancement module to enhance the image by filtering. The halftone module processes the enhanced image data by the algorithm of error diffusion. It combines two different processes into one mechanism to simplify the hardware architecture and to decrease the usage of memory.
    Type: Application
    Filed: April 7, 2004
    Publication date: June 9, 2005
    Inventors: Hsiao-Yu Han, Jane Chang, Jessen Chen, Yu-Chu Huang, Shyh-Hsing Wang, Yao-Wen Huang
  • Publication number: 20050105137
    Abstract: A method for implementing error diffusion process with memory management is disclosed to separate several small blocks in one image that needs to be error diffused. The size of every small block is smaller than the internal static random access memory (SRAM) size. When doing error diffusion on one small block, the pixels located at the edge of the block that cannot be diffused are reserved in the SRAM or the dynamic random access memory (DRAM). When doing error diffusion on the next block, the previous reserved pixels are reused. These steps are repeated to process all the blocks until the whole image is finished with error diffusion. This method can reduce external DRAM access times, use smaller internal SRAM sizes and improve the performance of the image process hardware.
    Type: Application
    Filed: April 1, 2004
    Publication date: May 19, 2005
    Inventors: Shyh-Hsing Wang, Jessen Chen