Patents by Inventor Si-Chen Lee

Si-Chen Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230014503
    Abstract: An integrated circuit includes a substrate, a transistor over the substrate, a first inter-metal dielectric (IMD) layer over the transistor, a metal via in the first IMD layer, a first 2-D material layer cupping an underside of the metal via, a second IMD layer over the metal via, a metal line in the second IMD layer, and a second 2-D material layer cupping an underside of the metal line. The second 2-D material layer span across the metal via and the first 2-D material layer.
    Type: Application
    Filed: January 10, 2022
    Publication date: January 19, 2023
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen LIN, Yu-Wei ZHANG, Kuan-Chao CHEN, Si-Chen LEE, Chi CHEN
  • Patent number: 11211460
    Abstract: A method of fabricating a semiconductor device having two dimensional (2D) lateral hetero-structures includes forming alternating regions of a first metal dichalcogenide film and a second metal dichalcogenide film extending along a surface of a first substrate. The first metal dichalcogenide and the second metal dichalcogenide films are different metal dichalcogenides. Each second metal dichalcogenide film region is bordered on opposing lateral sides by a region of the first metal dichalcogenide film, as seen in cross-sectional view.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: December 28, 2021
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen Lin, Si-Chen Lee, Samuel C. Pan, Kuan-Chao Chen
  • Patent number: 11171212
    Abstract: A semiconductor device and method of formation are provided. The semiconductor device includes a substrate, a first active area over the substrate, a second active area over the substrate, a graphene channel between the first active area and the second active area, and a first in-plane gate. In some embodiments, the graphene channel, the first in-plane gate, the first active area, and the second active area include graphene. A method of forming the first in-plane gate, the first active area, the second active area, and the graphene channel from a single layer of graphene is also provided.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: November 9, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Meng-Yu Lin, Shih-Yen Lin, Si-Chen Lee
  • Patent number: 11152209
    Abstract: The current disclosure describes semiconductor devices, e.g., transistors, include a substrate, a semiconductor region including, at the surface, MoS2 and/or other monolayer material over the substrate, and a terminal structure at least partially over the semiconductor region, which includes a different monolayer material grown directly over the semiconductor region.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: October 19, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Yen Lin, Hsuan-An Chen, Si-Chen Lee
  • Patent number: 10985019
    Abstract: A method of fabricating a semiconductor device includes plasma etching a portion of a plurality of metal dichalcogenide films comprising a compound of a metal and a chalcogen disposed on a substrate by applying a plasma to the plurality of metal dichalcogenide films. After plasma etching, a chalcogen is applied to remaining portions of the plurality of metal dichalcogenide films to repair damage to the remaining portions of the plurality of metal dichalcogenide films from the plasma etching. The chalcogen is S, Se, or Te.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: April 20, 2021
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen Lin, Kuan-Chao Chen, Si-Chen Lee, Samuel C. Pan
  • Publication number: 20210005719
    Abstract: A method of fabricating a semiconductor device having two dimensional (2D) lateral hetero-structures includes forming alternating regions of a first metal dichalcogenide film and a second metal dichalcogenide film extending along a surface of a first substrate. The first metal dichalcogenide and the second metal dichalcogenide films are different metal dichalcogenides. Each second metal dichalcogenide film region is bordered on opposing lateral sides by a region of the first metal dichalcogenide film, as seen in cross-sectional view.
    Type: Application
    Filed: September 21, 2020
    Publication date: January 7, 2021
    Inventors: Shih-Yen LIN, Si-Chen LEE, Samuel C. PAN, Kuan-Chao CHEN
  • Patent number: 10784351
    Abstract: A method of fabricating a semiconductor device having two dimensional (2D) lateral hetero-structures includes forming alternating regions of a first metal dichalcogenide film and a second metal dichalcogenide film extending along a surface of a first substrate. The first metal dichalcogenide and the second metal dichalcogenide films are different metal dichalcogenides. Each second metal dichalcogenide film region is bordered on opposing lateral sides by a region of the first metal dichalcogenide film, as seen in cross-sectional view.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: September 22, 2020
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen Lin, Si-Chen Lee, Samuel C. Pan, Kuan-Chao Chen
  • Publication number: 20200266059
    Abstract: A method of fabricating a semiconductor device includes plasma etching a portion of a plurality of metal dichalcogenide films comprising a compound of a metal and a chalcogen disposed on a substrate by applying a plasma to the plurality of metal dichalcogenide films. After plasma etching, a chalcogen is applied to remaining portions of the plurality of metal dichalcogenide films to repair damage to the remaining portions of the plurality of metal dichalcogenide films from the plasma etching. The chalcogen is S, Se, or Te.
    Type: Application
    Filed: April 27, 2020
    Publication date: August 20, 2020
    Inventors: Shih-Yen LIN, Kuan-Chao CHEN, Si-Chen LEE, Samuel C. PAN
  • Publication number: 20200194258
    Abstract: The current disclosure describes semiconductor devices, e.g., transistors, include a substrate, a semiconductor region including, at the surface, MoS2 and/or other monolayer material over the substrate, and a terminal structure at least partially over the semiconductor region, which includes a different monolayer material grown directly over the semiconductor region.
    Type: Application
    Filed: December 12, 2019
    Publication date: June 18, 2020
    Inventors: Shih-Yen Lin, Hsuan-An Chen, Si-Chen Lee
  • Patent number: 10636652
    Abstract: A method of fabricating a semiconductor device includes plasma etching a portion of a plurality of metal dichalcogenide films comprising a compound of a metal and a chalcogen disposed on a substrate by applying a plasma to the plurality of metal dichalcogenide films. After plasma etching, a chalcogen is applied to remaining portions of the plurality of metal dichalcogenide films to repair damage to the remaining portions of the plurality of metal dichalcogenide films from the plasma etching. The chalcogen is S, Se, or Te.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: April 28, 2020
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen Lin, Kuan-Chao Chen, Si-Chen Lee, Samuel C. Pan
  • Patent number: 10541132
    Abstract: The current disclosure describes semiconductor devices, e.g., transistors, include a substrate, a semiconductor region including, at the surface, MoS2 and/or other monolayer material over the substrate, and a terminal structure at least partially over the semiconductor region, which includes a different monolayer material grown directly over the semiconductor region.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: January 21, 2020
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen Lin, Hsuan-An Chen, Si-Chen Lee
  • Publication number: 20190378715
    Abstract: The current disclosure describes semiconductor devices, e.g., transistors, include a substrate, a semiconductor region including, at the surface, MoS2 and/or other monolayer material over the substrate, and a terminal structure at least partially over the semiconductor region, which includes a different monolayer material grown directly over the semiconductor region.
    Type: Application
    Filed: June 11, 2018
    Publication date: December 12, 2019
    Inventors: Shih-Yen Lin, Hsuan-An Chen, Si-Chen Lee
  • Publication number: 20190319101
    Abstract: A semiconductor device and method of formation are provided. The semiconductor device includes a substrate, a first active area over the substrate, a second active area over the substrate, a graphene channel between the first active area and the second active area, and a first in-plane gate. In some embodiments, the graphene channel, the first in-plane gate, the first active area, and the second active area include graphene. A method of forming the first in-plane gate, the first active area, the second active area, and the graphene channel from a single layer of graphene is also provided.
    Type: Application
    Filed: April 22, 2019
    Publication date: October 17, 2019
    Inventors: Meng-Yu Lin, Shih-Yen Lin, Si-Chen Lee
  • Publication number: 20190237328
    Abstract: A method of fabricating a semiconductor device includes plasma etching a portion of a plurality of metal dichalcogenide films comprising a compound of a metal and a chalcogen disposed on a substrate by applying a plasma to the plurality of metal dichalcogenide films. After plasma etching, a chalcogen is applied to remaining portions of the plurality of metal dichalcogenide films to repair damage to the remaining portions of the plurality of metal dichalcogenide films from the plasma etching. The chalcogen is S, Se, or Te.
    Type: Application
    Filed: April 12, 2019
    Publication date: August 1, 2019
    Inventors: Shih-Yen LIN, Kuan-Chao CHEN, Si-Chen LEE, Samuel C. PAN
  • Patent number: 10269564
    Abstract: A method of fabricating a semiconductor device includes plasma etching a portion of a plurality of metal dichalcogenide films comprising a compound of a metal and a chalcogen disposed on a substrate by applying a plasma to the plurality of metal dichalcogenide films. After plasma etching, a chalcogen is applied to remaining portions of the plurality of metal dichalcogenide films to repair damage to the remaining portions of the plurality of metal dichalcogenide films from the plasma etching. The chalcogen is S, Se, or Te.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: April 23, 2019
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen Lin, Kuan-Chao Chen, Si-Chen Lee, Samuel C. Pan
  • Patent number: 10269902
    Abstract: A semiconductor device and method of formation are provided. The semiconductor device includes a substrate, a first active area over the substrate, a second active area over the substrate, a graphene channel between the first active area and the second active area, and a first in-plane gate. In some embodiments, the graphene channel, the first in-plane gate, the first active area, and the second active area include graphene. A method of forming the first in-plane gate, the first active area, the second active area, and the graphene channel from a single layer of graphene is also provided.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Meng-Yu Lin, Shih-Yen Lin, Si-Chen Lee
  • Patent number: 10157737
    Abstract: Semiconductor devices comprising two-dimensional (2D) materials and methods of manufacture thereof are described. In an embodiment, a method for manufacturing a semiconductor device comprising 2D materials may include: epitaxially forming a first 2D material layer on a substrate; and epitaxially forming a second 2D material layer over the first 2D material layer, the first 2D material layer and the second 2D material layer differing in composition.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: December 18, 2018
    Assignees: Taiwan Semiconductor Manufacturing Company, Ltd., National Taiwan University
    Inventors: Meng-Yu Lin, Shih-Yen Lin, Si-Chen Lee, Samuel C. Pan
  • Patent number: 10147603
    Abstract: In a method of fabricating a field effect transistor, a Mo layer is formed on the substrate. The Mo layer is sulfurized to convert it into a MoS2 layer. Source and drain electrodes are formed on the MoS2 layer. The MoS2 layer is treated with low-power oxygen plasma. A gate dielectric layer is formed on the MoS2 layer. A gate electrode is formed on the gate dielectric layer. An input electric power in the low-power oxygen plasma treatment is in a range from 15 W to 50 W.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: December 4, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Yen Lin, Chi-Wen Liu, Si-Chen Lee, Chong-Rong Wu, Kuan-Chao Chen
  • Publication number: 20180269059
    Abstract: A method of fabricating a semiconductor device includes plasma etching a portion of a plurality of metal dichalcogenide films comprising a compound of a metal and a chalcogen disposed on a substrate by applying a plasma to the plurality of metal dichalcogenide films. After plasma etching, a chalcogen is applied to remaining portions of the plurality of metal dichalcogenide films to repair damage to the remaining portions of the plurality of metal dichalcogenide films from the plasma etching. The chalcogen is S, Se, or Te.
    Type: Application
    Filed: October 5, 2017
    Publication date: September 20, 2018
    Inventors: Shih-Yen LIN, Kuan-Chao CHEN, Si-Chen LEE, Samuel C. PAN
  • Publication number: 20180269291
    Abstract: A method of fabricating a semiconductor device having two dimensional (2D) lateral hetero-structures includes forming alternating regions of a first metal dichalcogenide film and a second metal dichalcogenide film extending along a surface of a first substrate. The first metal dichalcogenide and the second metal dichalcogenide films are different metal dichalcogenides. Each second metal dichalcogenide film region is bordered on opposing lateral sides by a region of the first metal dichalcogenide film, as seen in cross-sectional view.
    Type: Application
    Filed: January 11, 2018
    Publication date: September 20, 2018
    Inventors: Shih-Yen LIN, Si-Chen LEE, Samuel C. PAN, Kuan-Chao CHEN