Patents by Inventor Si Deng

Si Deng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240103817
    Abstract: A method, system, and computer program product for script generation and recommendation from behavior trees are provided. The method receives a set of input commands within a programming interface. The set of input commands is parsed into a set of command parts. The set of input commands is normalized based on the set of command parts to generate a set of normalized commands. A set of behavior trees are generated based on the set of normalized commands and the set of parts. The method generates a set of command scripts based on the set of behavior trees.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 28, 2024
    Inventors: Jing Zhao, Xiao Yun Wang, Si Yu Chen, Jiang Yi Liu, Jiangang Deng
  • Publication number: 20240100507
    Abstract: Disclosed is a composition for inhibiting nitrate decomposition and its preparation method, which belongs to a field of photocatalytic technology, comprising: weighing titanium dioxide and pure phase metal carbonate or pure phase metal bicarbonate proportionally; adding the weighed pure phase metal carbonate or the pure phase metal bicarbonate to titanium dioxide for grinding to obtain a metal carbonate/bicarbonate-containing mixture. The method of inhibiting nitrate decomposition using the metal carbonate/bicarbonate of the present disclosure has a significant ability to inhibit nitrate decomposition, and the experimental results show that the method of inhibiting nitrate decomposition using the metal carbonate/bicarbonate can effectively inhibit the decomposition of the nitrate under irradiation for a long time.
    Type: Application
    Filed: March 24, 2023
    Publication date: March 28, 2024
    Inventors: Yanjuan SUN, Hong WANG, Fan DONG, Yangyang YU, Bangwei DENG, Si CHEN, Qin GENG
  • Patent number: 10504946
    Abstract: An array substrate manufacturing method and an array substrate are provided. The array substrate manufacturing method uses an organic photoresist material to form a passivation protection layer for substituting the conventional passivation protection layer that is made of a silicon nitride material and applies one mask to subject the passivation protection layer and a planarization layer to exposure and development so as to obtain a third via that is located above the first drain electrode and a fourth via that is located above the second drain electrode and, thus, compared to the prior art techniques, saves one mask and reduces one etching process so as to achieve the purposes of simplifying the manufacturing process and saving manufacturing cost. The array substrate so manufactured has a simple structure and a low manufacturing cost and possesses excellent electrical performance.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: December 10, 2019
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Si Deng
  • Patent number: 10473990
    Abstract: A manufacture method of a low temperature poly-silicon array substrate is provided. A halftone mask is utilized to realize a patterning process applied to a polysilicon layer and an N type heavy doping process of a polysilicon section of an NMOS region. In comparison with prior art, one mask is saved, and thus, the production cost is reduced, and a low temperature poly-silicon array substrate manufactured with such a process possesses excellent electronic property.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: November 12, 2019
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Si Deng, Yuan Guo
  • Publication number: 20180373076
    Abstract: A manufacture method of a low temperature poly-silicon array substrate is provided. A halftone mask is utilized to realize a patterning process applied to a polysilicon layer and an N type heavy doping process of a polysilicon section of an NMOS region. In comparison with prior art, one mask is saved, and thus, the production cost is reduced, and a low temperature poly-silicon array substrate manufactured with such a process possesses excellent electronic property.
    Type: Application
    Filed: September 12, 2018
    Publication date: December 27, 2018
    Inventors: Si Deng, Yuan Guo
  • Publication number: 20180366498
    Abstract: An array substrate manufacturing method and an array substrate are provided. The array substrate manufacturing method uses an organic photoresist material to form a passivation protection layer for substituting the conventional passivation protection layer that is made of a silicon nitride material and applies one mask to subject the passivation protection layer and a planarization layer to exposure and development so as to obtain a third via that is located above the first drain electrode and a fourth via that is located above the second drain electrode and, thus, compared to the prior art techniques, saves one mask and reduces one etching process so as to achieve the purposes of simplifying the manufacturing process and saving manufacturing cost. The array substrate so manufactured has a simple structure and a low manufacturing cost and possesses excellent electrical performance.
    Type: Application
    Filed: August 13, 2018
    Publication date: December 20, 2018
    Inventor: Si Deng
  • Patent number: 10101620
    Abstract: The present invention provides a manufacture method of a Low Temperature Poly-silicon array substrate. A halftone mask is utilized to realize the pattern process to the polysilicon layer and the N type heavy doping process of the polysilicon section of the NMOS region. In comparison with prior art, one mask is eliminated, and thus, the production cost is reduced, and the manufactured Low Temperature Poly-silicon array substrate possesses fine electronic property.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: October 16, 2018
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Si Deng, Yuan Guo
  • Patent number: 10068933
    Abstract: The present invention provides an array substrate manufacturing method and an array substrate. The array substrate manufacturing method of the present invention uses an organic photoresist material to form a passivation protection layer (90) for substituting the conventional passivation protection layer that is made of a silicon nitride material and applies one mask to subject the passivation protection layer (90) and a planarization layer (70) to exposure and development so as to obtain a third via (91) that is located above the first drain electrode (62) and a fourth via (92) that is located above the second drain electrode (64) and, thus, compared the prior art techniques, saves one mask and reduces one etching process so as to achieve the purposes of simplifying the manufacturing process and saving manufacturing cost. The array substrate of the present invention has a simple structure and low manufacturing cost and possesses excellent electrical performance.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: September 4, 2018
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Si Deng
  • Publication number: 20180067351
    Abstract: The present invention provides a manufacture method of a Low Temperature Poly-silicon array substrate. A halftone mask is utilized to realize the pattern process to the polysilicon layer and the N type heavy doping process of the polysilicon section of the NMOS region. In comparison with prior art, one mask is eliminated, and thus, the production cost is reduced, and the manufactured Low Temperature Poly-silicon array substrate possesses fine electronic property.
    Type: Application
    Filed: May 20, 2016
    Publication date: March 8, 2018
    Inventors: Si Deng, Yuan Guo
  • Publication number: 20180047764
    Abstract: The present invention provides an array substrate manufacturing method and an array substrate. The array substrate manufacturing method of the present invention uses an organic photoresist material to form a passivation protection layer (90) for substituting the conventional passivation protection layer that is made of a silicon nitride material and applies one mask to subject the passivation protection layer (90) and a planarization layer (70) to exposure and development so as to obtain a third via (91) that is located above the first drain electrode (62) and a fourth via (92) that is located above the second drain electrode (64) and, thus, compared the prior art techniques, saves one mask and reduces one etching process so as to achieve the purposes of simplifying the manufacturing process and saving manufacturing cost. The array substrate of the present invention has a simple structure and low manufacturing cost and possesses excellent electrical performance.
    Type: Application
    Filed: February 29, 2016
    Publication date: February 15, 2018
    Inventor: Si Deng