Patents by Inventor Si-En Chang

Si-En Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090164877
    Abstract: A memo voice recording/playback method and a digital photo frame using the method are provided. The method is suitable for a digital image playback apparatus. The digital image playback apparatus has memo voice recording function and memo voice playback function and includes a display unit for image displaying. The method includes: displaying an image; judging whether memo voice recording function of the digital image playback apparatus is enabled or not; and executing a memo voice recording procedure to edit the recorded memo voice into a memo voice file associated with the image if it is judged that the memo voice recording function is enabled.
    Type: Application
    Filed: November 17, 2008
    Publication date: June 25, 2009
    Applicant: PROLIFIC TECHNOLOGY INC.
    Inventors: Si-En Chang, Kun-Shien Tsai, Ching-Hung Wu, Ming-Deng Hsieh, Ming-Tsai Hsu
  • Patent number: 7509643
    Abstract: One embodiment of the present invention facilitates favoring the performance of a single-threaded application in a computer system that supports simultaneous multi-threading (SMT), wherein multiple threads of execution simultaneously execute in an interleaved manner on functional units within a processor. During operation, the system maintains a priority for each simultaneously executing thread. The system uses these priorities in allocating a shared computational resource between the simultaneously executing threads, so that a thread with a higher priority is given preferential access to the shared computational resource. This asymmetric treatment of the threads enables+ the system to favor the performance of a single-threaded application while performing simultaneous multi-threading.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: March 24, 2009
    Assignee: Sun Microsystems, Inc.
    Inventors: Xiaogang Qiu, Si-En Chang
  • Patent number: 7444549
    Abstract: One embodiment of the present invention provides a system that facilitates debugging an integrated circuit without probing signal lines within the integrated circuit. During operation the system updates a performance counter within the integrated circuit based on the occurrence of one or more performance events. Note that some integrated circuits already include a performance counter which is used to measure the performance of the integrated circuit. Next, the system triggers a debugging operation based on the content of the performance counter, thereby facilitating debugging of the integrated circuit without probing signal lines within the integrated circuit. By using the performance counter to trigger the debugging operation in addition to measuring performance, the present invention can substantially reduce the amount of additional circuitry required to facilitate debugging of the integrated circuit.
    Type: Grant
    Filed: January 11, 2005
    Date of Patent: October 28, 2008
    Assignee: Sun Microsystems, Inc.
    Inventor: Si-En Chang
  • Patent number: 7188324
    Abstract: A method and apparatus provides a mechanism to transform or “morph” Formal verification method assertions so that an assertion defined in one Design Under Test (DUT) can be replicated, or derived, to propagate into other related DUTs. Using the method and apparatus of the present invention, individual DUTs can better leverage assertions defined independently in other DUT environments. This, in turn, provides for greater productivity and a faster, smoother verification process-using Formal and Assertion Based Verification methods.
    Type: Grant
    Filed: July 16, 2004
    Date of Patent: March 6, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Xiaogang Qiu, Si-En Chang
  • Publication number: 20040194094
    Abstract: One embodiment of the present invention facilitates favoring the performance of a single-threaded application in a computer system that supports simultaneous multi-threading (SMT), wherein multiple threads of execution simultaneously execute in an interleaved manner on functional units within a processor. During operation, the system maintains a priority for each simultaneously executing thread. The system uses these priorities in allocating a shared computational resource between the simultaneously executing threads, so that a thread with a higher priority is given preferential access to the shared computational resource. This asymmetric treatment of the threads enables+ the system to favor the performance of a single-threaded application while performing simultaneous multi-threading.
    Type: Application
    Filed: March 24, 2003
    Publication date: September 30, 2004
    Inventors: Xiaogang Qiu, Si-En Chang
  • Patent number: 6728938
    Abstract: A systematic methodology to analyze a full scan dump is presented. The methodology is knowledge-based, i.e., the methodology intelligently processes a full scan dump using knowledge of the system from which the full scan is obtained.
    Type: Grant
    Filed: April 26, 2002
    Date of Patent: April 27, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Si-En Chang
  • Publication number: 20030204825
    Abstract: A systematic methodology to analyze a full scan dump is presented. The methodology is knowledge-based, i.e., the methodology intelligently processes a full scan dump using knowledge of the system from which the full scan is obtained.
    Type: Application
    Filed: April 26, 2002
    Publication date: October 30, 2003
    Inventor: Si-En Chang