Patents by Inventor Si-Ho Song

Si-Ho Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11665914
    Abstract: A three-dimensional semiconductor memory device includes first conductive lines extending horizontally in a first direction, a second conductive line extending vertically in a second direction perpendicular to the first direction, and memory cells at cross-points between the first conductive lines and the second conductive line. The first conductive lines are laterally spaced apart from each other in a third direction crossing the first direction. Each of the memory cells includes a variable resistance element and a switching element that are horizontally arranged.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: May 30, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Si-Ho Song, Jeonghee Park, Changhyun Cho
  • Patent number: 11456334
    Abstract: A semiconductor device including a data storage pattern is provided. The semiconductor device includes: specific resistivities a first conductive line disposed on a substrate and extending in a first direction; a second conductive line disposed above the first metal wiring; a plurality of variable resistance structures each of which includes a plurality of electrodes and a plurality of variable resistance patterns alternately stacked between the first metal wiring and the second metal wiring, wherein the plurality of variable resistance patterns are formed of a variable resistance material having a same composition, and the plurality of electrodes have different material characteristics such as different specific resistivities.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: September 27, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Si Ho Song, Ye Ro Lee
  • Publication number: 20210384256
    Abstract: A three-dimensional semiconductor memory device includes first conductive lines extending horizontally in a first direction, a second conductive line extending vertically in a second direction perpendicular to the first direction, and memory cells at cross-points between the first conductive lines and the second conductive line. The first conductive lines are laterally spaced apart from each other in a third direction crossing the first direction. Each of the memory cells includes a variable resistance element and a switching element that are horizontally arranged.
    Type: Application
    Filed: August 19, 2021
    Publication date: December 9, 2021
    Inventors: Si-Ho SONG, Jeonghee PARK, Changhyun CHO
  • Patent number: 11127792
    Abstract: A three-dimensional semiconductor memory device includes first conductive lines extending horizontally in a first direction, a second conductive line extending vertically in a second direction perpendicular to the first direction, and memory cells at cross-points between the first conductive lines and the second conductive line. The first conductive lines are laterally spaced apart from each other in a third direction crossing the first direction. Each of the memory cells includes a variable resistance element and a switching element that are horizontally arranged.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: September 21, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Si-Ho Song, Jeonghee Park, Changhyun Cho
  • Patent number: 10985213
    Abstract: A nonvolatile memory device includes a memory cell array, a word line drive block that is connected to a first group of memory cells through a first group of word lines and to a second group of memory cells through a second group of word lines, a bit line bias and sense block that is connected to the first and second groups of memory cells through bit lines, a variable current supply block that generates a word line current to be supplied to a selected word line, and a control logic block that receives an address and a command and controls the variable current supply block to adjust an amount of the word line current based on the address. The control logic block further varies the amount of the word line current depending on a distance between the selected word line and the substrate.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: April 20, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Si-Ho Song, Youngbae Kim, Dueung Kim, Changhyun Cho
  • Patent number: 10923655
    Abstract: Disclosed are a variable resistance memory device and a method of manufacturing the same. The device comprises a first conductive line extending in a first direction, a second conductive line extending in a second direction intersecting the first direction, a memory cell at an intersection between the first conductive line and the second conductive line, a first electrode between the first conductive line and the memory cell, and a second electrode between the second conductive line and the memory cell. The memory cell comprises a switching pattern, an intermediate electrode, a first resistivity control pattern, and a variable resistance pattern that are connected in series between the first conductive line and the second conductive line. Resistivity of the first resistivity control pattern is less than resistivity of the second electrode.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: February 16, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji-Hyun Jeong, Ilmok Park, Si-Ho Song
  • Publication number: 20200395409
    Abstract: A three-dimensional semiconductor memory device includes first conductive lines extending horizontally in a first direction, a second conductive line extending vertically in a second direction perpendicular to the first direction, and memory cells at cross-points between the first conductive lines and the second conductive line. The first conductive lines are laterally spaced apart from each other in a third direction crossing the first direction. Each of the memory cells includes a variable resistance element and a switching element that are horizontally arranged.
    Type: Application
    Filed: December 11, 2019
    Publication date: December 17, 2020
    Inventors: Si-Ho SONG, Jeonghee PARK, Changhyun CHO
  • Publication number: 20200381478
    Abstract: A nonvolatile memory device includes a memory cell array, a word line drive block that is connected to a first group of memory cells through a first group of word lines and to a second group of memory cells through a second group of word lines, a bit line bias and sense block that is connected to the first and second groups of memory cells through bit lines, a variable current supply block that generates a word line current to be supplied to a selected word line, and a control logic block that receives an address and a command and controls the variable current supply block to adjust an amount of the word line current based on the address. The control logic block further varies the amount of the word line current depending on a distance between the selected word line and the substrate.
    Type: Application
    Filed: February 3, 2020
    Publication date: December 3, 2020
    Inventors: SI-HO SONG, YOUNGBAE KIM, DUEUNG KIM, CHANGHYUN CHO
  • Publication number: 20200136037
    Abstract: Disclosed are a variable resistance memory device and a method of manufacturing the same. The device comprises a first conductive line extending in a first direction, a second conductive line extending in a second direction intersecting the first direction, a memory cell at an intersection between the first conductive line and the second conductive line, a first electrode between the first conductive line and the memory cell, and a second electrode between the second conductive line and the memory cell. The memory cell comprises a switching pattern, an intermediate electrode, a first resistivity control pattern, and a variable resistance pattern that are connected in series between the first conductive line and the second conductive line. Resistivity of the first resistivity control pattern is less than resistivity of the second electrode.
    Type: Application
    Filed: December 24, 2019
    Publication date: April 30, 2020
    Inventors: Ji-Hyun JEONG, Ilmok PARK, Si-Ho SONG
  • Publication number: 20200111839
    Abstract: A semiconductor device including a data storage pattern is provided. The semiconductor device includes: specific resistivities a first conductive line disposed on a substrate and extending in a first direction; a second conductive line disposed above the first metal wiring; a plurality of variable resistance structures each of which includes a plurality of electrodes and a plurality of variable resistance patterns alternately stacked between the first metal wiring and the second metal wiring, wherein the plurality of variable resistance patterns are formed of a variable resistance material having a same composition, and the plurality of electrodes have different material characteristics such as different specific resistivities.
    Type: Application
    Filed: May 29, 2019
    Publication date: April 9, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Si Ho Song, Ye Ro Lee
  • Patent number: 10547000
    Abstract: Disclosed are a variable resistance memory device and a method of manufacturing the same. The device comprises a first conductive line extending in a first direction, a second conductive line extending in a second direction intersecting the first direction, a memory cell at an intersection between the first conductive line and the second conductive line, a first electrode between the first conductive line and the memory cell, and a second electrode between the second conductive line and the memory cell. The memory cell comprises a switching pattern, an intermediate electrode, a first resistivity control pattern, and a variable resistance pattern that are connected in series between the first conductive line and the second conductive line. Resistivity of the first resistivity control pattern is less than resistivity of the second electrode.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: January 28, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji-Hyun Jeong, Ilmok Park, Si-Ho Song
  • Publication number: 20190123102
    Abstract: A non-volatile memory device includes a substrate, a first electrode on the substrate, a second electrode on the substrate, a selection layer between the first electrode and the second electrode, and a memory layer contacting any one of the first electrode and the second electrode. The first electrode has a first width in a first direction. The second electrode is spaced apart from the first electrode in a second direction perpendicular to the first direction. The second electrode has a second width in the first direction. The selection element layer includes a first doped layer that contacts the first electrode. The first doped layer includes an impurity at a first concentration. The selection element layer includes a second doped layer that contacts the second electrode. The second doped layer includes the impurity at a second concentration lower than the first concentration.
    Type: Application
    Filed: May 1, 2018
    Publication date: April 25, 2019
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Si-Ho SONG, II Mok PARK, Kwang-Woo LEE, Se Gab KWON
  • Publication number: 20190123272
    Abstract: Disclosed are a variable resistance memory device and a method of manufacturing the same. The device comprises a first conductive line extending in a first direction, a second conductive line extending in a second direction intersecting the first direction, a memory cell at an intersection between the first conductive line and the second conductive line, a first electrode between the first conductive line and the memory cell, and a second electrode between the second conductive line and the memory cell. The memory cell comprises a switching pattern, an intermediate electrode, a first resistivity control pattern, and a variable resistance pattern that are connected in series between the first conductive line and the second conductive line. Resistivity of the first resistivity control pattern is less than resistivity of the second electrode.
    Type: Application
    Filed: June 21, 2018
    Publication date: April 25, 2019
    Inventors: Ji-Hyun JEONG, ILMOK PARK, Si-Ho SONG
  • Publication number: 20150049999
    Abstract: An ultra-low loss optical fiber is provided. The ultra-low loss optical fiber includes a core having the maximum refractive index inside an optical fiber, and placed at the central portion of the optical fiber, a trench having the minimum refractive index inside the optical fiber and encompassing the core, and a cladding encompassing the trench. The core includes a first sub-core layer having the maximum refractive index inside the optical fiber, and placed at the center of the optical fiber, a second sub-core layer having a refractive index lower than that of the first sub-core layer and encompassing the first sub-core layer, and a third sub-core layer having a refractive index lower than that of the second sub-core layer and encompassing the second sub-core layer.
    Type: Application
    Filed: November 22, 2012
    Publication date: February 19, 2015
    Inventors: Yeong-Seop Lee, Mun-Hyun Do, Si-Ho Song, Dea-Hwan Oh, Dae-Seung Moon, Kyung-Hwan Oh
  • Publication number: 20140376869
    Abstract: An optical fiber is provided. The optical fiber includes a core located at the center of the optical fiber and having a maximum refractive index in the optical fiber, and a cladding located at a circumference of the core and having a refractive index lower than that of the core. The core has a structure in which sub-core areas having the refractive index higher than those of adjacent sub-core areas and sub-core areas having the refractive index lower than those of adjacent sub-core areas are alternately repeated.
    Type: Application
    Filed: June 12, 2014
    Publication date: December 25, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yeong-Seop LEE, Mun-Hyun DO, Dae-Seung MOON, Si-Ho SONG, Dea-Hwan OH, Tae-Hyung LEE
  • Patent number: 8787719
    Abstract: Provided is an extreme bending insensitive optical fiber. The optical fiber includes a core comprising a maximum refractive index difference ?n1 in the optical fiber, an inner layer comprising a refractive index difference ?n2 that is smaller than the maximum refractive index of the core and decreases in a direction away from the core, the inner layer being positioned outside the core, and a trench layer comprising an inner-circumference refractive index difference ?n3 that is smaller than the refractive index difference of the inner layer and an outer-circumference refractive index difference ?n4 that is a minimum refractive index difference in the optical fiber.
    Type: Grant
    Filed: October 16, 2012
    Date of Patent: July 22, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yeong-Seop Lee, Mun-Hyun Do, Si-Ho Song, Myung-Hwan Pyo, Dae-Hwan Oh, Won-Sun Lee, Dae-Seung Moon, Tae-Hyung Lee, Tae-Hun Kim
  • Publication number: 20130094824
    Abstract: Provided is an extreme bending insensitive optical fiber. The optical fiber includes a core comprising a maximum refractive index difference ?n1 in the optical fiber, an inner layer comprising a refractive index difference ?n2 that is smaller than the maximum refractive index of the core and decreases in a direction away from the core, the inner layer being positioned outside the core, and a trench layer comprising an inner-circumference refractive index difference ?n3 that is smaller than the refractive index difference of the inner layer and an outer-circumference refractive index difference ?n4 that is a minimum refractive index difference in the optical fiber.
    Type: Application
    Filed: October 16, 2012
    Publication date: April 18, 2013
    Inventors: Yeong-Seop Lee, Mun-Hyun Do, Si-Ho Song, Myung-Hwan Pyo, Dae-Hwan Oh, Won-Sun Lee, Dae-Seung Moon, Tae-Hyung Lee, Tae-Hun Kim
  • Publication number: 20050039493
    Abstract: A vapor axial deposition apparatus for creating an optical fiber perform includes a starting rod axially fixed at one end to a chuck that rotates and moves vertically. A rod cap fixed to the other end of the starting rod is a rotary body with a downwardly facing end portion in axial alignment with the starting rod, and can be configured it various shapes. One heater underneath the rod cap, which receives fuel and raw material, shoots flames up at the rod cap to create a core while another heater, similarly supplied, laterally shoots flames at an outer circumference of the rod cap to create a cladding. A deposited core/cladding ratio is adjusted according to shapes of the rod cap, and finely adjusted by controlling fuel and raw material, the distance between the heaters and the angling of the heaters.
    Type: Application
    Filed: July 23, 2004
    Publication date: February 24, 2005
    Inventors: Si-Ho Song, Yeong-Seop Lee